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Searched refs:REG_SC_BK04_10_L (Results 1 – 25 of 56) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_ip.c2035 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(0)|BIT(2)|BIT(5) , BIT(0)|BIT(2)|BIT(… in Hal_SC_ip_set_handshaking_md()
2039 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(3) , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2043 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2048 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(0)|BIT(2)|BIT(5)); in Hal_SC_ip_set_handshaking_md()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_ip.c2034 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(0)|BIT(2)|BIT(5) , BIT(0)|BIT(2)|BIT(… in Hal_SC_ip_set_handshaking_md()
2038 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(3) , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2042 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2047 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(0)|BIT(2)|BIT(5)); in Hal_SC_ip_set_handshaking_md()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_ip.c2034 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(0)|BIT(2)|BIT(5) , BIT(0)|BIT(2)|BIT(… in Hal_SC_ip_set_handshaking_md()
2038 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(3) , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2042 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2047 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(0)|BIT(2)|BIT(5)); in Hal_SC_ip_set_handshaking_md()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_ip.c2034 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(0)|BIT(2)|BIT(5) , BIT(0)|BIT(2)|BIT(… in Hal_SC_ip_set_handshaking_md()
2038 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, BIT(3) , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2042 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(3)); in Hal_SC_ip_set_handshaking_md()
2047 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_10_L, 0 , BIT(0)|BIT(2)|BIT(5)); in Hal_SC_ip_set_handshaking_md()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mainz/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maserati/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mainz/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/include/
H A Dhwreg_dlc.h1187 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maldives/wble/include/
H A Dhwreg_wble.h1185 #define REG_SC_BK04_10_L _PK_L_(0x04, 0x10) macro

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