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Searched refs:REG_SC_BK04_0A_L (Results 1 – 25 of 81) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/include/
H A DKano_Sub.c346 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x40, 0x00 },//Same mark
352 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/include/
H A DCurry_Sub.c346 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x40, 0x00 },//Same mark
352 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x80, 0x00/*$OFF*/,
H A DKano_Sub.c346 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x40, 0x00 },//Same mark
352 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/include/
H A Dk6lite_Sub.c346 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x40, 0x00 },//Same mark
352 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/include/
H A Dk6_Sub.c346 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x40, 0x00 },//Same mark
352 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dip.c1437 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (SC_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15)) != 0… in HAL_XC_DIP_SetWinProperty()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dip.c1435 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (SC_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15)) != 0… in HAL_XC_DIP_SetWinProperty()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c1528 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (SC_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15)) != 0… in HAL_XC_DIP_SetWinProperty()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main.c61800 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x10, 0x00/*OFF*/, },
61801 { PQ_MAP_REG(REG_SC_BK04_0A_L), 0x0F, 0x00/*OFF*/, },
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dip.c323 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (DIP_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15)) != … in IsNeedAverageMode()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c277 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (DIP_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15)) != … in IsNeedAverageMode()
H A Dmhal_sc.c630 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, bEnable ? BIT(6) : 0, BIT(6)); in Hal_SC_set_422_cbcr_swap()
6048 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, 0x8000, 0x8000); in Hal_SC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c279 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (DIP_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15)) != … in IsNeedAverageMode()
H A Dmhal_sc.c696 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, bEnable ? BIT(6) : 0, BIT(6)); in Hal_SC_set_422_cbcr_swap()
6210 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, 0x8000, 0x8000); in Hal_SC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_dip.c695 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (DIP_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15),eWin… in IsNeedAverageMode()
H A Dmhal_sc.c692 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, bEnable ? BIT(6) : 0, BIT(6)); in Hal_SC_set_422_cbcr_swap()
5937 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, 0x8000, 0x8000); in Hal_SC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_sc.c823 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, bEnable ? BIT(6) : 0, BIT(6)); in Hal_SC_set_422_cbcr_swap()
6539 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_0A_L, 0x8000, 0x8000); in Hal_SC_Init()
H A Dmhal_dip.c742 …else if( (eSource == SCALER_DIP_SOURCE_TYPE_SUB) && (DIP_R2BYTEMSK(0,REG_SC_BK04_0A_L,BIT(15),eWin… in IsNeedAverageMode()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c328 SC_W2BYTEMSK(0,REG_SC_BK04_0A_L, bEnable ? BIT(6) : 0, BIT(6)); in Hal_SC_set_422_cbcr_swap()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c332 SC_W2BYTEMSK(0,REG_SC_BK04_0A_L, bEnable ? BIT(6) : 0, BIT(6)); in Hal_SC_set_422_cbcr_swap()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h1173 #define REG_SC_BK04_0A_L _PK_L_(0x04, 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h1173 #define REG_SC_BK04_0A_L _PK_L_(0x04, 0x0A) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h1175 #define REG_SC_BK04_0A_L _PK_L_(0x04, 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h1173 #define REG_SC_BK04_0A_L _PK_L_(0x04, 0x0A) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h1175 #define REG_SC_BK04_0A_L _PK_L_(0x04, 0x0A) macro

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