| /utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/ |
| H A D | mhal_pq_adaptive.c | 2555 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_DETECT_driver()
2643 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_driver()
2947 reg_HD_th = MApi_XC_R2BYTE(REG_SC_BK02_71_L ); in MDrv_SC_NEW_SDHD_DETECT_report2()
2950 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x100, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
2971 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, reg_HD_th, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
3028 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/ |
| H A D | mhal_pq_adaptive.c | 2555 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_DETECT_driver()
2643 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_driver()
2947 reg_HD_th = MApi_XC_R2BYTE(REG_SC_BK02_71_L ); in MDrv_SC_NEW_SDHD_DETECT_report2()
2950 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x100, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
2971 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, reg_HD_th, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
3028 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/ |
| H A D | mhal_pq_adaptive.c | 2555 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_DETECT_driver()
2643 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_driver()
2947 reg_HD_th = MApi_XC_R2BYTE(REG_SC_BK02_71_L ); in MDrv_SC_NEW_SDHD_DETECT_report2()
2950 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x100, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
2971 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, reg_HD_th, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
3028 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/ |
| H A D | mhal_pq_adaptive.c | 2555 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_DETECT_driver()
2643 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_driver()
2947 reg_HD_th = MApi_XC_R2BYTE(REG_SC_BK02_71_L ); in MDrv_SC_NEW_SDHD_DETECT_report2()
2950 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x100, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
2971 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, reg_HD_th, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report2()
3028 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_report()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/ |
| H A D | mhal_pq_adaptive.c | 1997 reg.HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) ); in MDrv_SC_SaveHpfSetting()
2017 MS_U16 HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) );
2057 …MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x01D8, 0xFFFF); /*for HD repot*/ //Reset for Full range in M… in MDrv_SC_hpfDefaultRelod()
2067 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfDefaultRelod()
7862 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0280, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfTolerantReport()
7911 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0100, 0xFFFF); in MDrv_SC_dynamicHDfilterBaseReport()
7916 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); in MDrv_SC_dynamicHDfilterBaseReport()
7984 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterBaseReport()
8393 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, TH1, 0xFFFF); in MDrv_SC_SDHD_U11BaseReport()
8503 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterOneReport()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/ |
| H A D | mhal_pq_adaptive.c | 1997 reg.HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) ); in MDrv_SC_SaveHpfSetting()
2017 MS_U16 HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) );
2057 …MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x01D8, 0xFFFF); /*for HD repot*/ //Reset for Full range in M… in MDrv_SC_hpfDefaultRelod()
2067 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfDefaultRelod()
7862 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0280, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfTolerantReport()
7911 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0100, 0xFFFF); in MDrv_SC_dynamicHDfilterBaseReport()
7916 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); in MDrv_SC_dynamicHDfilterBaseReport()
7984 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterBaseReport()
8393 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, TH1, 0xFFFF); in MDrv_SC_SDHD_U11BaseReport()
8503 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterOneReport()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/ |
| H A D | mhal_pq_adaptive.c | 1997 reg.HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) ); in MDrv_SC_SaveHpfSetting()
2017 MS_U16 HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) );
2057 …MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x01D8, 0xFFFF); /*for HD repot*/ //Reset for Full range in M… in MDrv_SC_hpfDefaultRelod()
2067 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfDefaultRelod()
7862 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0280, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfTolerantReport()
8041 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterBaseReport()
8364 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, TH1, 0xFFFF); in MDrv_SC_SDHD_U11BaseReport()
8481 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterOneReport()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/ |
| H A D | mhal_pq_adaptive.c | 1997 reg.HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) ); in MDrv_SC_SaveHpfSetting()
2017 MS_U16 HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) );
2057 …MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x01D8, 0xFFFF); /*for HD repot*/ //Reset for Full range in M… in MDrv_SC_hpfDefaultRelod()
2067 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfDefaultRelod()
7862 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0280, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfTolerantReport()
8041 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterBaseReport()
8364 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, TH1, 0xFFFF); in MDrv_SC_SDHD_U11BaseReport()
8481 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterOneReport()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/ |
| H A D | mhal_pq_adaptive.c | 2010 reg.HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) ); in MDrv_SC_SaveHpfSetting()
2030 MS_U16 HDSDD0_det_mode_threshold = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_71_L, 0xFFFF) );
2069 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfDefaultRelod()
7829 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0280, 0xFFFF); /*for HD repot*/ in MDrv_SC_hpfTolerantReport()
7878 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0100, 0xFFFF); in MDrv_SC_dynamicHDfilterBaseReport()
7883 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, 0x0190, 0xFFFF); in MDrv_SC_dynamicHDfilterBaseReport()
7951 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterBaseReport()
8061 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)HDSDD_Det_threshold, 0xFFFF); in MDrv_SC_SDHD_FilterOneReport()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/ |
| H A D | mhal_pq_adaptive.c | 1963 MApi_XC_W2BYTEMSK(REG_SC_BK02_71_L, (MS_U16)u16HDSDDthreshold, 0xFFFF); in MDrv_SC_NEW_SDHD_DETECT_driver()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/ |
| H A D | Mooney_Main.c | 2408 { PQ_MAP_REG(REG_SC_BK02_71_L), 0xFF, 0x00/*OFF*/,
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| /utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/ |
| H A D | Maserati_Main.c | 2632 { PQ_MAP_REG(REG_SC_BK02_71_L), 0xFF, 0x90/*OFF*/,
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| /utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/ |
| H A D | Maserati_Main.c | 5008 { PQ_MAP_REG(REG_SC_BK02_71_L), 0xFF, 0x90/*OFF*/,
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| /utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/ |
| H A D | Manhattan_Main.c | 2605 { PQ_MAP_REG(REG_SC_BK02_71_L), 0xFF, 0x90 },
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| /utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/ |
| H A D | hwreg_wble.h | 857 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/ |
| H A D | hwreg_ace.h | 857 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/ |
| H A D | hwreg_dlc.h | 859 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/ |
| H A D | hwreg_ace.h | 857 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/ |
| H A D | hwreg_dlc.h | 859 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/ |
| H A D | Maxim_Main.c | 5009 { PQ_MAP_REG(REG_SC_BK02_71_L), 0xFF, 0x90/*OFF*/,
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| /utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/ |
| H A D | hwreg_wble.h | 857 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/ |
| H A D | hwreg_dlc.h | 859 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/ |
| H A D | hwreg_ace.h | 857 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/ |
| H A D | hwreg_dlc.h | 859 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/ |
| H A D | hwreg_ace.h | 857 #define REG_SC_BK02_71_L _PK_L_(0x02, 0x71) macro
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