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Searched refs:REG_SC_BK02_70_L (Results 1 – 25 of 63) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/
H A Dmhal_pq_adaptive.c1991 reg.HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) ); in MDrv_SC_SaveHpfSetting()
1992 reg.HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 ); in MDrv_SC_SaveHpfSetting()
1994 reg.HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 ); in MDrv_SC_SaveHpfSetting()
1995 reg.HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 ); in MDrv_SC_SaveHpfSetting()
2011 MS_BOOL HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) );
2012 MS_BOOL HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 );
2014 MS_U8 HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 );
2015 MS_U8 HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 );
2026 MS_U16 uxx = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0080) );
2055 MApi_XC_W2BYTEMSK(REG_SC_BK02_70_L, 0x4000, 0x7000); in MDrv_SC_hpfDefaultRelod()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/
H A Dmhal_pq_adaptive.c1991 reg.HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) ); in MDrv_SC_SaveHpfSetting()
1992 reg.HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 ); in MDrv_SC_SaveHpfSetting()
1994 reg.HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 ); in MDrv_SC_SaveHpfSetting()
1995 reg.HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 ); in MDrv_SC_SaveHpfSetting()
2011 MS_BOOL HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) );
2012 MS_BOOL HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 );
2014 MS_U8 HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 );
2015 MS_U8 HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 );
2026 MS_U16 uxx = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0080) );
2055 MApi_XC_W2BYTEMSK(REG_SC_BK02_70_L, 0x4000, 0x7000); in MDrv_SC_hpfDefaultRelod()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/
H A Dmhal_pq_adaptive.c1991 reg.HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) ); in MDrv_SC_SaveHpfSetting()
1992 reg.HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 ); in MDrv_SC_SaveHpfSetting()
1994 reg.HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 ); in MDrv_SC_SaveHpfSetting()
1995 reg.HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 ); in MDrv_SC_SaveHpfSetting()
2011 MS_BOOL HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) );
2012 MS_BOOL HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 );
2014 MS_U8 HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 );
2015 MS_U8 HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 );
2026 MS_U16 uxx = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0080) );
2055 MApi_XC_W2BYTEMSK(REG_SC_BK02_70_L, 0x4000, 0x7000); in MDrv_SC_hpfDefaultRelod()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/
H A Dmhal_pq_adaptive.c1991 reg.HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) ); in MDrv_SC_SaveHpfSetting()
1992 reg.HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 ); in MDrv_SC_SaveHpfSetting()
1994 reg.HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 ); in MDrv_SC_SaveHpfSetting()
1995 reg.HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 ); in MDrv_SC_SaveHpfSetting()
2011 MS_BOOL HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) );
2012 MS_BOOL HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 );
2014 MS_U8 HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 );
2015 MS_U8 HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 );
2026 MS_U16 uxx = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0080) );
2055 MApi_XC_W2BYTEMSK(REG_SC_BK02_70_L, 0x4000, 0x7000); in MDrv_SC_hpfDefaultRelod()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/
H A Dmhal_pq_adaptive.c2004 reg.HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) ); in MDrv_SC_SaveHpfSetting()
2005 reg.HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 ); in MDrv_SC_SaveHpfSetting()
2007 reg.HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 ); in MDrv_SC_SaveHpfSetting()
2008 reg.HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 ); in MDrv_SC_SaveHpfSetting()
2024 MS_BOOL HDSDD0_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0001) );
2025 MS_BOOL HDSDD1_det_mode = (MS_BOOL)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0010) >> 4 );
2027 MS_U8 HDSDD0_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0700) >> 8 );
2028 MS_U8 HDSDD1_det_mode_shift = (MS_U8)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x7000) >> 12 );
2039 MS_U16 uxx = (MS_U16)( MApi_XC_R2BYTEMSK(REG_SC_BK02_70_L, 0x0080) );
2067 MApi_XC_W2BYTEMSK(REG_SC_BK02_70_L, 0x4000, 0x7000); in MDrv_SC_hpfDefaultRelod()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DMaserati_Main.c2610 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x11, 0x11 },//Same mark
2618 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DMaserati_Main.c4986 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x11, 0x11 },//Same mark
4994 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DManhattan_Main.c2603 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x11, 0x11 },//Same mark
2615 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DMaxim_Main.c4988 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x11, 0x11 },//Same mark
4995 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A DMaxim_Main.c4988 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x11, 0x11 },//Same mark
4995 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x80, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main.c2397 { PQ_MAP_REG(REG_SC_BK02_70_L), 0x11, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h857 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h857 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h857 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h857 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h857 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h855 #define REG_SC_BK02_70_L _PK_L_(0x02, 0x70) macro

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