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Searched refs:REG_SC_BK01_0F_L (Results 1 – 25 of 70) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c1399 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, 0x40, BIT(6)); in MDrv_SC_clear_lpll()
1409 u16Tmp = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L); in MDrv_SC_monitor_lpll()
1414 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16Tmp & ~(BIT(6))); in MDrv_SC_monitor_lpll()
7394 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, bEnable? BIT(7):0, BIT(7)); in MDrv_XC_EnableIPAutoCoast()
7473 u16Tmp = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L); in MApi_XC_ClearIPCoastStatus_U2()
7478 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16Tmp & ~(BIT(6))); in MApi_XC_ClearIPCoastStatus_U2()
7493 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16Tmp & ~(BIT(6))); in MApi_XC_ClearIPCoastStatus_U2()
H A Dmdrv_sc_display.c.01397 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, 0x40, BIT(6));
1407 u16Tmp = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L);
1412 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16Tmp & ~(BIT(6)));
7392 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, bEnable? BIT(7):0, BIT(7));
7471 u16Tmp = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L);
7476 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16Tmp & ~(BIT(6)));
7491 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16Tmp & ~(BIT(6)));
H A Dmdrv_sc_ip.c4304 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u8Type, BIT(2) | BIT(1) | BIT(0)); in MApi_XC_GetAutoGainResult()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c1691 SC_W2BYTEMSK(0,REG_SC_BK01_0F_L, u16mask, 0x0F); in Hal_SC_rgb_average_info()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c1711 SC_W2BYTEMSK(0,REG_SC_BK01_0F_L, u16mask, 0x0F); in Hal_SC_rgb_average_info()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c2410 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16mask, 0x0F); in Hal_SC_rgb_average_info()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h402 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h402 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c2536 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16mask, 0x0F); in Hal_SC_rgb_average_info()
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h402 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_sc.c2976 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_0F_L, u16mask, 0x0F); in Hal_SC_rgb_average_info()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h402 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h402 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/include/
H A Dhwreg_dlc.h402 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mainz/wble/include/
H A Dhwreg_wble.h400 #define REG_SC_BK01_0F_L _PK_L_(0x01, 0x0F) macro

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