Searched refs:REG_MIU1_GROUP0_MASK (Results 1 – 1 of 1) sorted by relevance
5211 #define REG_MIU1_GROUP0_MASK (0x100646UL) macro5429 REG_WR(REG_MIU1_GROUP0_MASK, 0xFFF8); //enable miu counter in MDrv_GE_BitbltPerformance()