Searched refs:REG_MIU0_GROUP1_MASK (Results 1 – 1 of 1) sorted by relevance
5207 #define REG_MIU0_GROUP1_MASK (0x101266UL) macro5425 REG_WR(REG_MIU0_GROUP1_MASK, 0xFFFF); //enable miu counter in MDrv_GE_BitbltPerformance()