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Searched refs:REG_MAU1_LV2_0_BASE (Results 1 – 13 of 13) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
367 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DregVPU_EX.h234 #define REG_MAU1_LV2_0_BASE (0x63700) macro
240 #define REG_MAU1_LV2_0_BASE (0x63500) macro
375 #define MAU1_LV2_0_MIU_SEL (REG_MAU1_LV2_0_BASE+(0x0001<<1))
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DregVPU_EX.h243 #define REG_MAU1_LV2_0_BASE (0x63500) macro
250 #define MAU1_LV2_0_BASE(vpu) ((vpu==VPU_EVDR2)?(REG_MAU1_LV2_0_BASE):(REG_MAU1_LITE_LV2_0_BASE))