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Searched refs:REG_ISP_SPI_RDREQ (Results 1 – 25 of 30) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/flash/hal/kano/flash/serial/
H A DhalSERFLASH.c1371 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1413 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1506 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
2994 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3166 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3281 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3374 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3430 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3494 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3637 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/maldives/flash/serial/
H A DhalSERFLASH.c1651 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1690 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1782 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3287 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3496 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3611 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3704 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3837 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3903 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
4050 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h195 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/k6/flash/serial/
H A DhalSERFLASH.c1371 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1413 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1506 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
2994 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3166 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3281 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3374 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3430 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3494 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3637 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/curry/flash/serial/
H A DhalSERFLASH.c1380 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1425 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1520 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3008 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3180 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3295 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3388 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3444 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3508 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3651 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/k6lite/flash/serial/
H A DhalSERFLASH.c1394 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1436 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1529 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3012 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3187 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3302 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3394 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3450 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3514 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3657 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/mustang/flash/serial/
H A DhalSERFLASH.c1672 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1711 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1804 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3328 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3537 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3652 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3745 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3878 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3944 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
4091 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/mooney/flash/serial/
H A DhalSERFLASH.c1516 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1556 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1648 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3088 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3297 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3412 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3505 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3638 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3704 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3851 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/M7621/flash/serial/
H A DhalSERFLASH.c1553 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1593 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1685 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3125 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3334 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3449 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3542 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3675 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3741 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3888 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/mainz/flash/serial/
H A DhalSERFLASH.c1524 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1564 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1656 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3098 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3307 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3422 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3515 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3648 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3714 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3861 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h189 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/maserati/flash/serial/
H A DhalSERFLASH.c1553 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1593 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1685 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3125 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3334 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3449 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3542 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3675 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3741 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3888 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/M7821/flash/serial/
H A DhalSERFLASH.c1553 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1593 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1685 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3125 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3334 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3449 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3542 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3675 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3741 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3888 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/messi/flash/serial/
H A DhalSERFLASH.c1524 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1564 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1656 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3098 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3307 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3422 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3515 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3648 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3714 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3861 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h189 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/maxim/flash/serial/
H A DhalSERFLASH.c1553 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1593 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1685 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3125 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3334 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3449 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3542 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3675 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3741 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3888 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/macan/flash/serial/
H A DhalSERFLASH.c1516 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1556 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1648 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3088 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3297 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3412 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3505 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3638 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3704 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3851 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro
/utopia/UTPA2-700.0.x/modules/flash/hal/manhattan/flash/serial/
H A DhalSERFLASH.c1554 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_WaitWriteDone()
1594 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_CheckWriteDone()
1686 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in _HAL_SERFLASH_RIURead()
3126 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_SPSNDYB_UNLOCK()
3335 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadID()
3450 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadUID()
3543 ISP_WRITE(REG_ISP_SPI_RDREQ, ISP_SPI_RDREQ); // SPI read request in HAL_SERFLASH_ReadREMS4()
3676 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg()
3742 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SERFLASH_ReadStatusReg2()
3889 ISP_WRITE(REG_ISP_SPI_RDREQ, 0x01); // SPI read request in HAL_SPI_EnterIBPM()
[all …]
H A DregSERFLASH.h188 #define REG_ISP_SPI_RDREQ 0x0C macro

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