| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maldives/hwi2c/ |
| H A D | halHWI2C.c | 347 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
360 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
373 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
387 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
401 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
414 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1460 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 163 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/mainz/hwi2c/ |
| H A D | halHWI2C.c | 349 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
362 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
375 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
389 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
403 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
416 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1414 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 143 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/macan/hwi2c/ |
| H A D | halHWI2C.c | 347 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
360 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
373 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
387 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
401 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
414 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1458 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/mustang/hwi2c/ |
| H A D | halHWI2C.c | 347 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
360 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
373 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
387 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
401 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
414 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1460 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 163 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/messi/hwi2c/ |
| H A D | halHWI2C.c | 349 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
362 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
375 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
389 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
403 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
416 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1460 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/mooney/hwi2c/ |
| H A D | halHWI2C.c | 347 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
360 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
373 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
387 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
401 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
414 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1458 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/kano/hwi2c/ |
| H A D | halHWI2C.c | 173 0x0, HAL_HWI2C_ReadByte(REG_HWI2C_MIIC_CFG),
529 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
545 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
561 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
578 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
595 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
611 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1719 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/curry/hwi2c/ |
| H A D | halHWI2C.c | 173 0x0, HAL_HWI2C_ReadByte(REG_HWI2C_MIIC_CFG),
529 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
545 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
561 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
578 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
595 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
611 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1719 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6/hwi2c/ |
| H A D | halHWI2C.c | 173 0x0, HAL_HWI2C_ReadByte(REG_HWI2C_MIIC_CFG),
529 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
545 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
561 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
578 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
595 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
611 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1719 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6lite/hwi2c/ |
| H A D | halHWI2C.c | 173 0x0, HAL_HWI2C_ReadByte(REG_HWI2C_MIIC_CFG),
529 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
545 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
561 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
578 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
595 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
611 … return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1719 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u16PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maxim/hwi2c/ |
| H A D | halHWI2C.c | 371 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
384 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
397 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
411 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
425 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
438 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1752 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7621/hwi2c/ |
| H A D | halHWI2C.c | 371 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
384 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
397 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
411 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
425 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
438 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1752 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/manhattan/hwi2c/ |
| H A D | halHWI2C.c | 371 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
384 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
397 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
411 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
425 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
438 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1749 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7821/hwi2c/ |
| H A D | halHWI2C.c | 371 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
384 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
397 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
411 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
425 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
438 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1752 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maserati/hwi2c/ |
| H A D | halHWI2C.c | 371 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_INT, bEnable); in HAL_HWI2C_EnINT()
384 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_DMA, bEnable); in HAL_HWI2C_EnDMA()
397 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_CLKSTR, bEnable); in HAL_HWI2C_EnClkStretch()
411 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_TMTINT, bEnable);
425 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_FILTER, bEnable); in HAL_HWI2C_EnFilter()
438 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_EN_PUSH1T, bEnable); in HAL_HWI2C_EnPushSda()
1752 return HAL_HWI2C_WriteRegBit(REG_HWI2C_MIIC_CFG+u32PortOffset, _MIIC_CFG_RESET, bReset); in HAL_HWI2C_Reset()
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| H A D | regHWI2C.h | 165 #define REG_HWI2C_MIIC_CFG (HWI2C_REG_BASE+0x00*2) macro
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