Home
last modified time | relevance | path

Searched refs:REG_HWI2C_DMA_CFG (Results 1 – 25 of 30) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maldives/hwi2c/
H A DhalHWI2C.c433 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
446 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
459 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
477 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h206 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/mainz/hwi2c/
H A DhalHWI2C.c435 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
448 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
461 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
479 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h186 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/macan/hwi2c/
H A DhalHWI2C.c433 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
446 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
459 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
477 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h208 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/mustang/hwi2c/
H A DhalHWI2C.c433 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
446 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
459 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
477 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h206 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/messi/hwi2c/
H A DhalHWI2C.c435 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
448 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
461 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
479 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h208 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/mooney/hwi2c/
H A DhalHWI2C.c433 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
446 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
459 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
477 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h208 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/kano/hwi2c/
H A DhalHWI2C.c633 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
649 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
665 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
686 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/curry/hwi2c/
H A DhalHWI2C.c633 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
649 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
665 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
686 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6/hwi2c/
H A DhalHWI2C.c633 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
649 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
665 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
686 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6lite/hwi2c/
H A DhalHWI2C.c633 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
649 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
665 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
686 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u16PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maxim/hwi2c/
H A DhalHWI2C.c457 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
470 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
483 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
501 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7621/hwi2c/
H A DhalHWI2C.c457 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
470 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
483 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
501 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h226 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/manhattan/hwi2c/
H A DhalHWI2C.c457 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
470 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
483 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
501 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h226 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7821/hwi2c/
H A DhalHWI2C.c457 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
470 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
483 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
501 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h226 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maserati/hwi2c/
H A DhalHWI2C.c457 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_INTEN, bEnable); in HAL_HWI2C_DMA_SetINT()
470 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_RESET, bReset); in HAL_HWI2C_DMA_Reset()
483 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIURST, bReset); in HAL_HWI2C_DMA_MiuReset()
501 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CFG+u32PortOffset, _DMA_CFG_MIUPRI, bHighPri); in HAL_HWI2C_DMA_SetMiuPri()
H A DregHWI2C.h226 #define REG_HWI2C_DMA_CFG (HWI2C_REG_BASE+0x20*2) macro

12