REG_FRC_BK33A_53 (reference) in projects: utopia

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Searched refs:REG_FRC_BK33A_53 (Results 1 – 25 of 54) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A D	Maserati_2D_4K2K.c	106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 527 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_YUV() 948 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1369 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1790 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 2211 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_2205_YUV()
H A D	Maserati_2D_FHD.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 527 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maserati_2D_480.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_480_2D_480_RGB_BYPASS() 556 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_480_2D_480_YUV()`
H A D	Maserati_2D_576.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_576_2D_576_RGB_BYPASS() 556 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_576_2D_576_YUV()`
H A D	Maserati_2D_720.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_720_2D_720_RGB_BYPASS() 556 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_720_2D_720_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A D	Maserati_2D_4K2K.c	106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 527 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_YUV() 948 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1369 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1790 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 2211 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_2205_YUV()
H A D	Maserati_2D_FHD.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 527 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maserati_2D_720.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_720_2D_720_RGB_BYPASS() 556 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_720_2D_720_YUV()`
H A D	Maserati_2D_480.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_480_2D_480_RGB_BYPASS() 556 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_480_2D_480_YUV()`
H A D	Maserati_2D_576.c	`106 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_576_2D_576_RGB_BYPASS() 556 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_576_2D_576_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A D	Maxim_2D_4K2K.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 395 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_YUV() 739 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1083 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_YUV()`
H A D	Maxim_2D_FHD.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 395 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maxim_ACT_4K0_5K.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()`
H A D	Maxim_FRC_ACT_4K0_5K_LLRR_240.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_LLRR_240.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_ACT_4K1K.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()`
H A D	Maxim_FRC_ACT_4K2K_120.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A D	Maxim_2D_4K2K.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 395 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_YUV() 739 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1083 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_YUV()`
H A D	Maxim_2D_FHD.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 395 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maxim_FRC_ACT_4K0_5K_LLRR_240.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_PAS_4K2K_120.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_LLRR_240.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_120.c	`51 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A D	Manhattan_2D_4K2K.c	`117 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 585 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_YUV() 1053 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1521 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A D	Manhattan_2D_4K2K.c	`117 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 585 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x03, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_FHD_YUV() 1053 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1521 MDrv_WriteByteMask( REG_FRC_BK33A_53 , 0x08, 0xff); // d2lr_output_h in MFC_3D_2D_4K2K_2D_4K2K_YUV()`

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