Searched refs:REG_FRC_BK30D_10_L (Results 1 – 8 of 8) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_frc.c | 846 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(0),BIT(0)); //IPM_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
869 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(2),BIT(2)); //MEDS_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
930 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(1),BIT(1)); //IPM_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
953 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(3),BIT(3)); //MEDS_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_frc.c | 829 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(0),BIT(0)); //IPM_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
852 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(2),BIT(2)); //MEDS_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
913 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(1),BIT(1)); //IPM_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
936 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(3),BIT(3)); //MEDS_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_frc.c | 844 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(0),BIT(0)); //IPM_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
892 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(2),BIT(2)); //MEDS_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
990 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(1),BIT(1)); //IPM_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
1038 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(3),BIT(3)); //MEDS_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_frc.c | 844 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(0),BIT(0)); //IPM_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
892 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(2),BIT(2)); //MEDS_L memory address limit enable in MHal_FRC_IPM_SetBaseAddr()
990 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(1),BIT(1)); //IPM_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
1038 W2BYTEMSK(REG_FRC_BK30D_10_L, BIT(3),BIT(3)); //MEDS_R memory address limit enable in MHal_FRC_IPM_R_SetBaseAddr()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_frc_map.h | 5135 #define REG_FRC_BK30D_10_L FRC_PK_L_(0x30D, 0x10) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_frc_map.h | 5135 #define REG_FRC_BK30D_10_L FRC_PK_L_(0x30D, 0x10) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_frc_map.h | 5135 #define REG_FRC_BK30D_10_L FRC_PK_L_(0x30D, 0x10) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_frc_map.h | 5135 #define REG_FRC_BK30D_10_L FRC_PK_L_(0x30D, 0x10) macro
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