| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | Maserati_2D_4K2K.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 627 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_YUV() 1048 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1469 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1890 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 2311 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_2205_YUV()
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| H A D | Maserati_2D_FHD.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 627 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_YUV()
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| H A D | Maserati_2D_480.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_480_2D_480_RGB_BYPASS() 656 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_480_2D_480_YUV()
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| H A D | Maserati_2D_576.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_576_2D_576_RGB_BYPASS() 656 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_576_2D_576_YUV()
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| H A D | Maserati_2D_720.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_720_2D_720_RGB_BYPASS() 656 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_720_2D_720_YUV()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | Maserati_2D_4K2K.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 627 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_YUV() 1048 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1469 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1890 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 2311 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_2205_YUV()
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| H A D | Maserati_2D_FHD.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 627 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_YUV()
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| H A D | Maserati_2D_720.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_720_2D_720_RGB_BYPASS() 656 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_720_2D_720_YUV()
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| H A D | Maserati_2D_480.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_480_2D_480_RGB_BYPASS() 656 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_480_2D_480_YUV()
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| H A D | Maserati_2D_576.c | 206 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_576_2D_576_RGB_BYPASS() 656 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_576_2D_576_YUV()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | Maxim_2D_4K2K.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 493 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_YUV() 837 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1181 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_YUV()
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| H A D | Maxim_2D_FHD.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 493 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_YUV()
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| H A D | Maxim_ACT_4K0_5K.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()
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| H A D | Maxim_FRC_ACT_4K0_5K_LLRR_240.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x1c, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
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| H A D | Maxim_FRC_ACT_4K1K_LLRR_240.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()
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| H A D | Maxim_ACT_4K1K.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()
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| H A D | Maxim_FRC_ACT_4K2K_120.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | Maxim_2D_4K2K.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 493 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_YUV() 837 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1181 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_YUV()
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| H A D | Maxim_2D_FHD.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 493 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x38, 0xff); // reg_opm_vlen_new in MFC_3D_2D_FHD_2D_FHD_YUV()
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| H A D | Maxim_FRC_ACT_4K0_5K_LLRR_240.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x1c, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()
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| H A D | Maxim_FRC_PAS_4K2K_120.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()
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| H A D | Maxim_FRC_ACT_4K1K_LLRR_240.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()
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| H A D | Maxim_FRC_ACT_4K1K_120.c | 149 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | Manhattan_2D_4K2K.c | 217 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 685 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_YUV() 1153 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1621 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_YUV()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | Manhattan_2D_4K2K.c | 217 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 685 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_FHD_YUV() 1153 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1621 MDrv_WriteByteMask( REG_FRC_BK13B_CC , 0x70, 0xff); // reg_opm_vlen_new in MFC_3D_2D_4K2K_2D_4K2K_YUV()
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