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Searched refs:REG_FRC_BK13A_A0 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_frc.c1157 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x01, 0x01); // compression mode in MHal_FRC_Init()
1388 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x01, 0x01); // compression mode in MHal_FRC_Set_3D_QMap()
1401 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x00, 0x01); // compression mode in MHal_FRC_Set_3D_QMap()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_frc.c1459 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x01, 0x01); // compression mode in MHal_FRC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_frc.c1442 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x01, 0x01); // compression mode in MHal_FRC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_frc.c1763 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x01, 0x01); // compression mode in MHal_FRC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_frc.c1763 MDrv_WriteByteMask( REG_FRC_BK13A_A0, 0x01, 0x01); // compression mode in MHal_FRC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_frc_map.h8357 #define REG_FRC_BK13A_A0 (REG_FRC_BANK_BASE+0x13AA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_frc_map.h8357 #define REG_FRC_BK13A_A0 (REG_FRC_BANK_BASE+0x13AA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_frc_map.h8675 #define REG_FRC_BK13A_A0 (REG_FRC_BANK_BASE+0x13AA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_frc_map.h8675 #define REG_FRC_BK13A_A0 (REG_FRC_BANK_BASE+0x13AA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_frc_map.h8675 #define REG_FRC_BK13A_A0 (REG_FRC_BANK_BASE+0x13AA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_frc_map.h8675 #define REG_FRC_BK13A_A0 (REG_FRC_BANK_BASE+0x13AA0) macro