REG_FRC_BK13A_27 (reference) in projects: utopia

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched refs:REG_FRC_BK13A_27 (Results 1 – 25 of 54) sorted by relevance

12 3

/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A D	Maserati_2D_4K2K.c	254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 675 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 679 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_YUV() 1096 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1100 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1517 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1521 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1938 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 1942 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() [all …]
H A D	Maserati_2D_FHD.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 675 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_YUV() 679 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maserati_2D_480.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_480_2D_480_RGB_BYPASS() 704 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_480_2D_480_YUV() 708 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_480_2D_480_YUV()`
H A D	Maserati_2D_576.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_576_2D_576_RGB_BYPASS() 704 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_576_2D_576_YUV() 708 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_576_2D_576_YUV()`
H A D	Maserati_2D_720.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_720_2D_720_RGB_BYPASS() 704 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_720_2D_720_YUV() 708 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_720_2D_720_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A D	Maserati_2D_4K2K.c	254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 675 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 679 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_YUV() 1096 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1100 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1517 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1521 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1938 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 1942 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() [all …]
H A D	Maserati_2D_FHD.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 675 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_YUV() 679 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maserati_2D_720.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_720_2D_720_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_720_2D_720_RGB_BYPASS() 704 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_720_2D_720_YUV() 708 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_720_2D_720_YUV()`
H A D	Maserati_2D_480.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_480_2D_480_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_480_2D_480_RGB_BYPASS() 704 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_480_2D_480_YUV() 708 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_480_2D_480_YUV()`
H A D	Maserati_2D_576.c	`254 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_576_2D_576_RGB_BYPASS() 258 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_576_2D_576_RGB_BYPASS() 704 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_576_2D_576_YUV() 708 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_576_2D_576_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A D	Maxim_2D_4K2K.c	197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 541 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 545 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_YUV() 885 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 889 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1229 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1233 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_YUV()
H A D	Maxim_2D_FHD.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 541 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_YUV() 545 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maxim_ACT_4K0_5K.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()`
H A D	Maxim_FRC_ACT_4K0_5K_LLRR_240.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x00, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_LLRR_240.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_ACT_4K1K.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()`
H A D	Maxim_FRC_ACT_4K2K_120.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A D	Maxim_2D_4K2K.c	197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 541 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 545 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_YUV() 885 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 889 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1229 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1233 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_YUV()
H A D	Maxim_2D_FHD.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 541 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_FHD_2D_FHD_YUV() 545 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maxim_FRC_ACT_4K0_5K_LLRR_240.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x00, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_PAS_4K2K_120.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_LLRR_240.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_120.c	`197 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x01, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A D	Manhattan_2D_4K2K.c	265 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 269 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 733 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 737 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_YUV() 1201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1205 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1669 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1673 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_YUV()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A D	Manhattan_2D_4K2K.c	265 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 269 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 733 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_FHD_YUV() 737 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_FHD_YUV() 1201 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1205 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1669 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x80, 0x80); // reg_ipm_meds_ud_en in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1673 MDrv_WriteByteMask( REG_FRC_BK13A_27 , 0x02, 0x1f); // reg_ipm_turn_back_line_meds in MFC_3D_2D_4K2K_2D_4K2K_YUV()

12 3