REG_FRC_BK134_E9 (reference) in projects: utopia

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Searched refs:REG_FRC_BK134_E9 (Results 1 – 25 of 54) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A D	Maserati_2D_4K2K.c	284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 705 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_YUV() 706 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_YUV() 1126 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1127 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1547 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1548 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1968 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 1969 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() [all …]
H A D	Maserati_2D_FHD.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 705 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_YUV() 706 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maserati_2D_480.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_480_2D_480_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_480_2D_480_RGB_BYPASS() 734 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_480_2D_480_YUV() 735 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_480_2D_480_YUV()`
H A D	Maserati_2D_576.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_576_2D_576_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_576_2D_576_RGB_BYPASS() 734 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_576_2D_576_YUV() 735 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_576_2D_576_YUV()`
H A D	Maserati_2D_720.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_720_2D_720_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_720_2D_720_RGB_BYPASS() 734 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_720_2D_720_YUV() 735 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_720_2D_720_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A D	Maserati_2D_4K2K.c	284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 705 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_YUV() 706 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_YUV() 1126 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1127 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1547 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1548 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1968 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() 1969 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_2205_RGB_BYPASS() [all …]
H A D	Maserati_2D_FHD.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 705 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_YUV() 706 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maserati_2D_720.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_720_2D_720_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_720_2D_720_RGB_BYPASS() 734 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_720_2D_720_YUV() 735 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_720_2D_720_YUV()`
H A D	Maserati_2D_480.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_480_2D_480_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_480_2D_480_RGB_BYPASS() 734 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_480_2D_480_YUV() 735 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_480_2D_480_YUV()`
H A D	Maserati_2D_576.c	`284 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_576_2D_576_RGB_BYPASS() 285 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_576_2D_576_RGB_BYPASS() 734 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_576_2D_576_YUV() 735 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_576_2D_576_YUV()`
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A D	Maxim_2D_4K2K.c	227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 571 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_YUV() 572 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_YUV() 915 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 916 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1259 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1260 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_YUV()
H A D	Maxim_2D_FHD.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 571 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_YUV() 572 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maxim_ACT_4K0_5K.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_4K0_5K_ACT_3D_4K0_5K_ACT_NO_FRC()`
H A D	Maxim_FRC_ACT_4K0_5K_LLRR_240.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_LLRR_240.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_ACT_4K1K.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_4K1K_ACT_3D_4K1K_ACT_NO_FRC()`
H A D	Maxim_FRC_ACT_4K2K_120.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_ACT_4K2K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A D	Maxim_2D_4K2K.c	227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 571 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_YUV() 572 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_YUV() 915 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 916 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1259 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1260 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_YUV()
H A D	Maxim_2D_FHD.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_RGB_BYPASS() 571 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_FHD_2D_FHD_YUV() 572 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_FHD_2D_FHD_YUV()`
H A D	Maxim_FRC_ACT_4K0_5K_LLRR_240.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_ACT_4K0_5K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_PAS_4K2K_120.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_PAS_4K2K_120_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_LLRR_240.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_ACT_4K1K_LLRR_240_3D_FHD_TB()`
H A D	Maxim_FRC_ACT_4K1K_120.c	`227 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB() 228 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_FRC_ACT_4K1K_120_3D_FHD_TB()`
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A D	Manhattan_2D_4K2K.c	295 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 296 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 763 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_YUV() 764 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_YUV() 1231 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1232 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1699 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1700 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_YUV()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A D	Manhattan_2D_4K2K.c	295 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 296 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_RGB_BYPASS() 763 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_FHD_YUV() 764 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_FHD_YUV() 1231 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x08, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1232 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x10, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_RGB_BYPASS() 1699 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x08); // reg_rbk_free in MFC_3D_2D_4K2K_2D_4K2K_YUV() 1700 MDrv_WriteByteMask( REG_FRC_BK134_E9 , 0x00, 0x70); // reg_rbk_free_diff in MFC_3D_2D_4K2K_2D_4K2K_YUV()

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