Searched refs:REG_CLKGEN2_TSN_TS4TS5 (Results 1 – 4 of 4) sorted by relevance
279 #define REG_CLKGEN2_TSN_TS4TS5 0x18UL //s2p0, ts4 mux clk macro1924 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
293 #define REG_CLKGEN2_TSN_TS4TS5 0x18UL //s2p0, ts4 mux clk macro1946 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
297 #define REG_CLKGEN2_TSN_TS4TS5 0x18UL //s2p0, ts4 mux clk macro2033 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()
297 #define REG_CLKGEN2_TSN_TS4TS5 0x18UL //s2p0, ts4 mux clk macro1994 …TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) = (TSP_CLKGEN2_REG(REG_CLKGEN2_TSN_TS4TS5) & ~(REG_CLKGEN0… in HAL_TSP_TsOutPadCfg()