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Searched refs:REG_CKG_MFE (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mfe/hal/curry/mfe_ex/
H A Dmhal_mfe.c245 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x1; // 4'b0001, disable MFE clock in MHal_MFE_PowerOff()
251 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x0; break; // 4'b0000 in MHal_MFE_PowerOff()
253 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x4; break; // 4'b0100 in MHal_MFE_PowerOff()
255 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x8; break; // 4'b1000 in MHal_MFE_PowerOff()
257 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0xC; break; // 4'b1100 in MHal_MFE_PowerOff()
259 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0xC; break; // 4'b1100 in MHal_MFE_PowerOff()
H A Dmhal_mfe.h162 #define REG_CKG_MFE (0x510) // ((0x100a - 0x1000) << 7) + 0x10 macro
164 #define REG_CKG_MFE (0x1998) // ((0x1033 - 0x1000) << 7) + 0x18 macro
/utopia/UTPA2-700.0.x/modules/mfe/hal/kano/mfe_ex/
H A Dmhal_mfe.c245 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x1; // 4'b0001, disable MFE clock in MHal_MFE_PowerOff()
251 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x0; break; // 4'b0000 in MHal_MFE_PowerOff()
253 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x4; break; // 4'b0100 in MHal_MFE_PowerOff()
255 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x8; break; // 4'b1000 in MHal_MFE_PowerOff()
257 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0xC; break; // 4'b1100 in MHal_MFE_PowerOff()
259 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0xC; break; // 4'b1100 in MHal_MFE_PowerOff()
H A Dmhal_mfe.h162 #define REG_CKG_MFE (0x510) // ((0x100a - 0x1000) << 7) + 0x10 macro
164 #define REG_CKG_MFE (0x1998) // ((0x1033 - 0x1000) << 7) + 0x18 macro
/utopia/UTPA2-700.0.x/modules/mfe/hal/k6/mfe_ex/
H A Dmhal_mfe.c245 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x1; // 4'b0001, disable MFE clock in MHal_MFE_PowerOff()
251 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x0; break; // 4'b0000 in MHal_MFE_PowerOff()
253 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x4; break; // 4'b0100 in MHal_MFE_PowerOff()
255 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0x8; break; // 4'b1000 in MHal_MFE_PowerOff()
257 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0xC; break; // 4'b1100 in MHal_MFE_PowerOff()
259 *(MS_U16*)(T8_RIU_BASE + (REG_CKG_MFE * 4)) = 0xC; break; // 4'b1100 in MHal_MFE_PowerOff()
H A Dmhal_mfe.h162 #define REG_CKG_MFE (0x510) // ((0x100a - 0x1000) << 7) + 0x10 macro
164 #define REG_CKG_MFE (0x1998) // ((0x1033 - 0x1000) << 7) + 0x18 macro