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Searched refs:REG_ADC_DTOP_5A_L (Results 1 – 25 of 37) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c1343 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1419 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2348 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2501 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c1343 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1419 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2348 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2507 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c1352 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1428 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2364 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2547 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c1343 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1419 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2348 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2501 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_adc.c1362 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1438 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2478 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2667 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_adc.c1354 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1430 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2470 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2659 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_adc.c1354 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1430 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2470 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2653 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_adc.c1354 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1430 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2470 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2653 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_adc.c1354 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1430 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2470 …ePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2630 …W2BYTEMSK(REG_ADC_DTOP_5A_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c1368 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2376 _stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2470 W2BYTEMSK(REG_ADC_DTOP_5A_L, _stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c1368 W2BYTEMSK(REG_ADC_DTOP_5A_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2376 _stAutoAdcSetting.B_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_5A_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2470 W2BYTEMSK(REG_ADC_DTOP_5A_L, _stAutoAdcSetting.B_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_adc_dtop.h286 #define REG_ADC_DTOP_5A_L (REG_ADC_DTOP_BASE + 0xB4) macro

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