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Searched refs:REG_ADC_DTOP_09_L (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_adc.c673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
684 W2BYTEMSK(REG_ADC_DTOP_09_L, ~(pstADCSetting->u16GreenGain), LBMASK);
1010 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value, LBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_adc.c673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
684 W2BYTEMSK(REG_ADC_DTOP_09_L, ~(pstADCSetting->u16GreenGain), LBMASK);
1010 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value, LBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_adc.c673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
684 W2BYTEMSK(REG_ADC_DTOP_09_L, ~(pstADCSetting->u16GreenGain), LBMASK);
1010 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value, LBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_adc.c673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
684 W2BYTEMSK(REG_ADC_DTOP_09_L, ~(pstADCSetting->u16GreenGain), LBMASK);
1010 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value, LBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c1401 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x1400,0x1F00); in Hal_ADC_clk_gen_setting()
1408 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0A00,0x1F00); in Hal_ADC_clk_gen_setting()
1415 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0100,0x1F00); in Hal_ADC_clk_gen_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c1401 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x1400,0x1F00); in Hal_ADC_clk_gen_setting()
1408 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0A00,0x1F00); in Hal_ADC_clk_gen_setting()
1415 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0100,0x1F00); in Hal_ADC_clk_gen_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c1453 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x1400,0x1F00); in Hal_ADC_clk_gen_setting()
1460 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0A00,0x1F00); in Hal_ADC_clk_gen_setting()
1467 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0100,0x1F00); in Hal_ADC_clk_gen_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c1453 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x1400,0x1F00); in Hal_ADC_clk_gen_setting()
1460 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0A00,0x1F00); in Hal_ADC_clk_gen_setting()
1467 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0100,0x1F00); in Hal_ADC_clk_gen_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c1462 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x1400,0x1F00); in Hal_ADC_clk_gen_setting()
1469 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0A00,0x1F00); in Hal_ADC_clk_gen_setting()
1476 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0100,0x1F00); in Hal_ADC_clk_gen_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c1453 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x1400,0x1F00); in Hal_ADC_clk_gen_setting()
1460 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0A00,0x1F00); in Hal_ADC_clk_gen_setting()
1467 W2BYTEMSK(REG_ADC_DTOP_09_L, 0x0100,0x1F00); in Hal_ADC_clk_gen_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_adc_dtop.h124 #define REG_ADC_DTOP_09_L (REG_ADC_DTOP_BASE + 0x12) macro

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