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Searched refs:REG_ADC_DTOP_05_L (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_adc_dtop.h116 #define REG_ADC_DTOP_05_L (REG_ADC_DTOP_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c1996 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2041 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c1996 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2041 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c1952 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2003 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c1952 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2003 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c1961 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2019 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c1952 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2003 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_adc.c2075 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2133 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_adc.c2067 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2125 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_adc.c2067 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2125 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_adc.c2067 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()
2125 } while(!R2BYTEMSK(REG_ADC_DTOP_05_L, (BIT(7) | BIT(6)) )); in Hal_ADC_set_mode()

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