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Searched refs:REG_ADC_DTOPB_05_L (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c1153 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1160 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1163 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1182 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1186 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1193 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1198 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1201 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c1153 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1160 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1163 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1182 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1186 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1193 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1198 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1201 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c1117 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1124 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1127 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1146 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1150 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1162 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1165 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c1117 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1124 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1127 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1146 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1150 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1162 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1165 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c1126 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1133 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1136 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1155 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1159 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1166 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1171 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1174 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c1117 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1124 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1127 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1146 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1150 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1162 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1165 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_adc.c1136 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1143 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1146 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1165 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1169 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1176 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1181 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1184 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_adc.c1128 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1135 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1138 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1161 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1168 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1173 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1176 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_adc.c1128 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1135 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1138 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1161 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1168 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1173 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1176 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_adc.c1128 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1135 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1138 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1161 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1168 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1173 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1176 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_adc.c1128 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1135 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(12) , BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1138 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(11:8) ); in Hal_ADC_dtop_internaldc_setting()
1157 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(3:0) ); in Hal_ADC_dtop_internaldc_setting()
1161 W2BYTEMSK(REG_ADC_DTOPB_05_L, 0x00 , BMASK(12:8) ); in Hal_ADC_dtop_internaldc_setting()
1168 W2BYTEMSK(REG_ADC_DTOPB_05_L, BIT(8) | BIT(12) , BIT(8) | BIT(12) ); in Hal_ADC_dtop_internaldc_setting()
1173 W2BYTEMSK(REG_ADC_DTOPB_05_L, BMASK(3:2) , BMASK(3:2) ); in Hal_ADC_dtop_internaldc_setting()
1176 W2BYTEMSK(REG_ADC_DTOPB_05_L, u16regvalue , BMASK(1:0) ); in Hal_ADC_dtop_internaldc_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_adc_dtopb.h116 #define REG_ADC_DTOPB_05_L (REG_ADC_DTOPB_BASE + 0x0A) macro