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Searched refs:PQ_GRULE_PTP_IP_NUM_Main (Results 1 – 13 of 13) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main_GRule.h349 #define PQ_GRULE_PTP_IP_NUM_Main 2 macro
409 extern code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main];
410 …code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main];
H A DMooney_Main_GRule.c68 code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main]=
38083 code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DManhattan_Main_GRule.h299 #define PQ_GRULE_PTP_IP_NUM_Main 2 macro
347 extern code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main];
348 …code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main];
H A DManhattan_Main_GRule.c70 code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main]=
47535 code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DMaserati_Main_GRule.h331 #define PQ_GRULE_PTP_IP_NUM_Main 2 macro
386 extern code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main];
387 …code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main];
H A DMaserati_Main_GRule.c59 code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main]=
46469 code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A DMaxim_Main_GRule.h329 #define PQ_GRULE_PTP_IP_NUM_Main 2 macro
384 extern code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main];
385 …code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main];
H A DMaxim_Main_GRule.c59 code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main]=
45363 code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DMaxim_Main_GRule.h329 #define PQ_GRULE_PTP_IP_NUM_Main 2 macro
384 extern code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main];
385 …code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main];
H A DMaxim_Main_GRule.c59 code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main]=
45363 code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DMaserati_Main_GRule.h331 #define PQ_GRULE_PTP_IP_NUM_Main 2 macro
386 extern code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main];
387 …code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main];
H A DMaserati_Main_GRule.c59 code U8 MST_GRule_PTP_IP_Index_Main[PQ_GRULE_PTP_IP_NUM_Main]=
45360 code U8 MST_GRule_PTP_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_PTP_NUM_Main][PQ_GRULE_PTP_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/drv/pq/
H A DdrvPQ_cus.c2980 for(i=0; i<PQ_GRULE_PTP_IP_NUM_Main; i++) in _MDrv_PQ_LoadPTPTable()
3412 PQTableInfo.u8PQ_GRule_IPNum[E_GRULE_PTP] = PQ_GRULE_PTP_IP_NUM_Main; in _MDrv_PQ_Set_DisplayType_Main()