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Searched refs:PQ_GRULE_OSD_BW_IP_NUM_Main (Results 1 – 13 of 13) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main_GRule.h319 #define PQ_GRULE_OSD_BW_IP_NUM_Main 3 macro
384 extern code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main];
385 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main];
H A DMooney_Main_GRule.c15 code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main]=
22334 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DManhattan_Main_GRule.h269 #define PQ_GRULE_OSD_BW_IP_NUM_Main 3 macro
322 extern code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main];
323 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main];
H A DManhattan_Main_GRule.c15 code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main]=
25240 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DMaserati_Main_GRule.h307 #define PQ_GRULE_OSD_BW_IP_NUM_Main 3 macro
366 extern code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main];
367 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main];
H A DMaserati_Main_GRule.c15 code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main]=
26355 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A DMaxim_Main_GRule.h305 #define PQ_GRULE_OSD_BW_IP_NUM_Main 3 macro
364 extern code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main];
365 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main];
H A DMaxim_Main_GRule.c15 code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main]=
25733 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DMaxim_Main_GRule.h305 #define PQ_GRULE_OSD_BW_IP_NUM_Main 3 macro
364 extern code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main];
365 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main];
H A DMaxim_Main_GRule.c15 code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main]=
25733 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DMaserati_Main_GRule.h307 #define PQ_GRULE_OSD_BW_IP_NUM_Main 3 macro
366 extern code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main];
367 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main];
H A DMaserati_Main_GRule.c15 code U8 MST_GRule_OSD_BW_IP_Index_Main[PQ_GRULE_OSD_BW_IP_NUM_Main]=
25730 …ST_GRule_OSD_BW_Main[QM_INPUTTYPE_NUM_Main][PQ_GRULE_OSD_BW_NUM_Main][PQ_GRULE_OSD_BW_IP_NUM_Main]=
/utopia/UTPA2-700.0.x/modules/pq/drv/pq/
H A DdrvPQ_cus.c1525 for(i = 0; i < PQ_GRULE_OSD_BW_IP_NUM_Main; i++) in _MDrv_PQ_LoadOSD_BWTable()
3405 PQTableInfo.u8PQ_GRule_IPNum[E_GRULE_OSD_BW] = PQ_GRULE_OSD_BW_IP_NUM_Main; in _MDrv_PQ_Set_DisplayType_Main()
3789 #if (PQ_GRULE_OSD_BW_IP_NUM_Main > 1) in MDrv_PQ_GetMADiFromOSDBWGrule_U2()