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Searched refs:HBMASK (Results 1 – 25 of 115) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_mux.c229 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
230 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
233 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
265 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
266 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
301 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
302 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
304 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
336 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
H A Dmhal_hdmi.c1006 W2BYTEMSK(REG_MHL_TMDS_5F_L, breset, HBMASK); in Hal_MHL_TMDS_pkt_reset()
1008 W2BYTEMSK(REG_MHL_TMDS_5F_L, 0x0000, HBMASK); in Hal_MHL_TMDS_pkt_reset()
1049 W2BYTEMSK(REG_HDMI_5F_L, breset, HBMASK); in Hal_HDMI_pkt_reset()
1051 W2BYTEMSK(REG_HDMI_5F_L, 0x0000, HBMASK); in Hal_HDMI_pkt_reset()
1130 W2BYTEMSK( REG_DVI_DTOP_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1132 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1134 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1136 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1154 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1156 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_mux.c229 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
230 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
233 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
265 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
266 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
301 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
302 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
304 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
336 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
H A Dmhal_hdmi.c1006 W2BYTEMSK(REG_MHL_TMDS_5F_L, breset, HBMASK); in Hal_MHL_TMDS_pkt_reset()
1008 W2BYTEMSK(REG_MHL_TMDS_5F_L, 0x0000, HBMASK); in Hal_MHL_TMDS_pkt_reset()
1049 W2BYTEMSK(REG_HDMI_5F_L, breset, HBMASK); in Hal_HDMI_pkt_reset()
1051 W2BYTEMSK(REG_HDMI_5F_L, 0x0000, HBMASK); in Hal_HDMI_pkt_reset()
1130 W2BYTEMSK( REG_DVI_DTOP_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1132 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1134 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1136 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1154 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
1156 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_HDMI_init()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c222 … W2BYTEMSK( REG_DVI_DTOP_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
223 …W2BYTEMSK( REG_DVI_DTOP_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update G… in Hal_SC_mux_set_dvi_mux()
226 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
245 … W2BYTEMSK( REG_DVI_DTOP1_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
246 …W2BYTEMSK( REG_DVI_DTOP1_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
248 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
268 … W2BYTEMSK( REG_DVI_DTOP2_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
269 …W2BYTEMSK( REG_DVI_DTOP2_2A_L, 0xE3E3, HBMASK|LBMASK); // [15:8]: update Rch slowly, [7:0]:update … in Hal_SC_mux_set_dvi_mux()
271 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_29_L, 0, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
291 … W2BYTEMSK( REG_DVI_DTOP3_29_L, 0xE300, HBMASK); // [15]:update Bch slowly; [14:8]: 0x63(100 lines) in Hal_SC_mux_set_dvi_mux()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/
H A Dmhal_ace.c173 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
184 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
198 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
209 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
489 u8Green = SC_R2BYTEMSK(0,REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
494 u8VOP_16H = SC_R2BYTEMSK(0,REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
500 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
511 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
516 SC_W2BYTEMSK(0,REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
524 SC_W2BYTEMSK(0,REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/ace/
H A Dmhal_ace.c173 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
184 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
198 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
209 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
489 u8Green = SC_R2BYTEMSK(0,REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
494 u8VOP_16H = SC_R2BYTEMSK(0,REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
500 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
511 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
516 SC_W2BYTEMSK(0,REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
524 SC_W2BYTEMSK(0,REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/
H A Dmhal_ace.c173 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
184 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
198 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
209 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
489 u8Green = SC_R2BYTEMSK(0,REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
494 u8VOP_16H = SC_R2BYTEMSK(0,REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
500 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
511 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
516 SC_W2BYTEMSK(0,REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
524 SC_W2BYTEMSK(0,REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/ace/
H A Dmhal_ace.c173 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
184 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
198 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
209 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
489 u8Green = SC_R2BYTEMSK(0,REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
494 u8VOP_16H = SC_R2BYTEMSK(0,REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
500 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
511 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
516 SC_W2BYTEMSK(0,REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
524 SC_W2BYTEMSK(0,REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_adc.c565 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x02<<8), HBMASK);
569 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x0E<<8), HBMASK);
672 W2BYTEMSK(REG_ADC_DTOP_08_L, (~(pstADCSetting->u16RedOffset))<<8, HBMASK);
673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
674 W2BYTEMSK(REG_ADC_DTOP_0A_L, (~(pstADCSetting->u16BlueOffset))<<8, HBMASK);
789 W2BYTEMSK(REG_ADC_ATOP_2D_L, VClampSetting << 8, HBMASK);
1025 W2BYTEMSK(REG_ADC_DTOP_08_L, u16value<<8, HBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
1033 W2BYTEMSK(REG_ADC_DTOP_0A_L, u16value<<8, HBMASK);
1210 adc_tbl.u8ADC_Power_04H |= ~(R2BYTEMSK(REG_ADC_ATOP_04_L, HBMASK));
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_adc.c565 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x02<<8), HBMASK);
569 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x0E<<8), HBMASK);
672 W2BYTEMSK(REG_ADC_DTOP_08_L, (~(pstADCSetting->u16RedOffset))<<8, HBMASK);
673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
674 W2BYTEMSK(REG_ADC_DTOP_0A_L, (~(pstADCSetting->u16BlueOffset))<<8, HBMASK);
789 W2BYTEMSK(REG_ADC_ATOP_2D_L, VClampSetting << 8, HBMASK);
1025 W2BYTEMSK(REG_ADC_DTOP_08_L, u16value<<8, HBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
1033 W2BYTEMSK(REG_ADC_DTOP_0A_L, u16value<<8, HBMASK);
1210 adc_tbl.u8ADC_Power_04H |= ~(R2BYTEMSK(REG_ADC_ATOP_04_L, HBMASK));
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_adc.c565 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x02<<8), HBMASK);
569 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x0E<<8), HBMASK);
672 W2BYTEMSK(REG_ADC_DTOP_08_L, (~(pstADCSetting->u16RedOffset))<<8, HBMASK);
673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
674 W2BYTEMSK(REG_ADC_DTOP_0A_L, (~(pstADCSetting->u16BlueOffset))<<8, HBMASK);
789 W2BYTEMSK(REG_ADC_ATOP_2D_L, VClampSetting << 8, HBMASK);
1025 W2BYTEMSK(REG_ADC_DTOP_08_L, u16value<<8, HBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
1033 W2BYTEMSK(REG_ADC_DTOP_0A_L, u16value<<8, HBMASK);
1210 adc_tbl.u8ADC_Power_04H |= ~(R2BYTEMSK(REG_ADC_ATOP_04_L, HBMASK));
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_adc.c565 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x02<<8), HBMASK);
569 W2BYTEMSK(REG_ADC_ATOP_4C_L, (0x0E<<8), HBMASK);
672 W2BYTEMSK(REG_ADC_DTOP_08_L, (~(pstADCSetting->u16RedOffset))<<8, HBMASK);
673 W2BYTEMSK(REG_ADC_DTOP_09_L, (~(pstADCSetting->u16GreenOffset))<<8, HBMASK);
674 W2BYTEMSK(REG_ADC_DTOP_0A_L, (~(pstADCSetting->u16BlueOffset))<<8, HBMASK);
789 W2BYTEMSK(REG_ADC_ATOP_2D_L, VClampSetting << 8, HBMASK);
1025 W2BYTEMSK(REG_ADC_DTOP_08_L, u16value<<8, HBMASK);
1029 W2BYTEMSK(REG_ADC_DTOP_09_L, u16value<<8, HBMASK);
1033 W2BYTEMSK(REG_ADC_DTOP_0A_L, u16value<<8, HBMASK);
1210 adc_tbl.u8ADC_Power_04H |= ~(R2BYTEMSK(REG_ADC_ATOP_04_L, HBMASK));
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/
H A Dmhal_ace.c161 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
172 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
186 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
197 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
567 u8Green = SC_R2BYTEMSK(0,REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
572 u8VOP_16H = SC_R2BYTEMSK(0,REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
578 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
589 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
594 SC_W2BYTEMSK(0,REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
602 SC_W2BYTEMSK(0,REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/
H A Dmhal_ace.c161 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
172 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
186 SC_W2BYTEMSK(0,REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
197 SC_W2BYTEMSK(0,REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
567 u8Green = SC_R2BYTEMSK(0,REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
572 u8VOP_16H = SC_R2BYTEMSK(0,REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
578 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
589 SC_W2BYTEMSK(0,REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
594 SC_W2BYTEMSK(0,REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
602 SC_W2BYTEMSK(0,REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/ace/
H A Dmhal_ace.c170 SC_W2BYTEMSK(0, REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
181 SC_W2BYTEMSK(0, REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
195 SC_W2BYTEMSK(0, REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
206 SC_W2BYTEMSK(0, REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
711 u8Green = SC_R2BYTEMSK(0, REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
716 u8VOP_16H = SC_R2BYTEMSK(0, REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
722 SC_W2BYTEMSK(0, REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
733 SC_W2BYTEMSK(0, REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
738 SC_W2BYTEMSK(0, REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
746 SC_W2BYTEMSK(0, REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/ace/
H A Dmhal_ace.c172 SC_W2BYTEMSK(0, REG_SC_BK18_72_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
183 SC_W2BYTEMSK(0, REG_SC_BK18_74_L, 0x01 <<8, HBMASK); in Hal_ACE_DMS()
197 SC_W2BYTEMSK(0, REG_SC_BK18_72_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
208 SC_W2BYTEMSK(0, REG_SC_BK18_74_L, 0x00 <<8, HBMASK); in Hal_ACE_DMS()
997 u8Green = SC_R2BYTEMSK(0, REG_SC_BK10_17_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
1002 u8VOP_16H = SC_R2BYTEMSK(0, REG_SC_BK10_16_L, HBMASK); in Hal_ACE_PatchDTGColorChecker()
1008 SC_W2BYTEMSK(0, REG_SC_BK10_17_L, 0x80 <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
1019 SC_W2BYTEMSK(0, REG_SC_BK10_17_L, ((MS_U16)u8Green) <<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
1024 SC_W2BYTEMSK(0, REG_SC_BK10_16_L, ((MS_U16)u8VOP_16H)<<8, HBMASK); in Hal_ACE_PatchDTGColorChecker()
1032 SC_W2BYTEMSK(0, REG_SC_BK1A_10_L, ((MS_U16)u8SlopValue) <<8, HBMASK); in Hal_ACE_SetSlopValue()
[all …]

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