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Searched refs:FRC_TGEN_VSYNC_END_FOR_UD_VB1_8LANE_DRDEPI (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_frc.h141 #define FRC_TGEN_VSYNC_END_FOR_UD_VB1_8LANE_DRDEPI 3 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_frc.h141 #define FRC_TGEN_VSYNC_END_FOR_UD_VB1_8LANE_DRDEPI 3 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_frc.c328 u16End = FRC_TGEN_VSYNC_END_FOR_UD_VB1_8LANE_DRDEPI; in MHal_FRC_TGEN_SetVSyncStartEndY()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_frc.c328 u16End = FRC_TGEN_VSYNC_END_FOR_UD_VB1_8LANE_DRDEPI; in MHal_FRC_TGEN_SetVSyncStartEndY()