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Searched refs:FRC_PK_H_ (Results 1 – 9 of 9) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (((MS_U16)bank << 8) | (MS_U16)(addr*2+1)) macro
107 #define REG_FRC_BK40_00_H FRC_PK_H_(0x40, 0x00)
109 #define REG_FRC_BK40_01_H FRC_PK_H_(0x40, 0x01)
111 #define REG_FRC_BK40_02_H FRC_PK_H_(0x40, 0x02)
113 #define REG_FRC_BK40_03_H FRC_PK_H_(0x40, 0x03)
115 #define REG_FRC_BK40_04_H FRC_PK_H_(0x40, 0x04)
117 #define REG_FRC_BK40_05_H FRC_PK_H_(0x40, 0x05)
119 #define REG_FRC_BK40_06_H FRC_PK_H_(0x40, 0x06)
121 #define REG_FRC_BK40_07_H FRC_PK_H_(0x40, 0x07)
123 #define REG_FRC_BK40_08_H FRC_PK_H_(0x40, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (((MS_U16)bank << 8) | (MS_U16)(addr*2+1)) macro
107 #define REG_FRC_BK40_00_H FRC_PK_H_(0x40, 0x00)
109 #define REG_FRC_BK40_01_H FRC_PK_H_(0x40, 0x01)
111 #define REG_FRC_BK40_02_H FRC_PK_H_(0x40, 0x02)
113 #define REG_FRC_BK40_03_H FRC_PK_H_(0x40, 0x03)
115 #define REG_FRC_BK40_04_H FRC_PK_H_(0x40, 0x04)
117 #define REG_FRC_BK40_05_H FRC_PK_H_(0x40, 0x05)
119 #define REG_FRC_BK40_06_H FRC_PK_H_(0x40, 0x06)
121 #define REG_FRC_BK40_07_H FRC_PK_H_(0x40, 0x07)
123 #define REG_FRC_BK40_08_H FRC_PK_H_(0x40, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (((MS_U16)bank << 8) | (MS_U16)(addr*2+1)) macro
107 #define REG_FRC_BK40_00_H FRC_PK_H_(0x40, 0x00)
109 #define REG_FRC_BK40_01_H FRC_PK_H_(0x40, 0x01)
111 #define REG_FRC_BK40_02_H FRC_PK_H_(0x40, 0x02)
113 #define REG_FRC_BK40_03_H FRC_PK_H_(0x40, 0x03)
115 #define REG_FRC_BK40_04_H FRC_PK_H_(0x40, 0x04)
117 #define REG_FRC_BK40_05_H FRC_PK_H_(0x40, 0x05)
119 #define REG_FRC_BK40_06_H FRC_PK_H_(0x40, 0x06)
121 #define REG_FRC_BK40_07_H FRC_PK_H_(0x40, 0x07)
123 #define REG_FRC_BK40_08_H FRC_PK_H_(0x40, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (REG_FRC_BANK_BASE + (((MS_U16)bank << 8) | (MS_U16)(addr… macro
108 #define REG_FRC_BK2C_00_H FRC_PK_H_(0x2C, 0x00)
110 #define REG_FRC_BK2C_01_H FRC_PK_H_(0x2C, 0x01)
112 #define REG_FRC_BK2C_02_H FRC_PK_H_(0x2C, 0x02)
114 #define REG_FRC_BK2C_03_H FRC_PK_H_(0x2C, 0x03)
116 #define REG_FRC_BK2C_04_H FRC_PK_H_(0x2C, 0x04)
118 #define REG_FRC_BK2C_05_H FRC_PK_H_(0x2C, 0x05)
120 #define REG_FRC_BK2C_06_H FRC_PK_H_(0x2C, 0x06)
122 #define REG_FRC_BK2C_07_H FRC_PK_H_(0x2C, 0x07)
124 #define REG_FRC_BK2C_08_H FRC_PK_H_(0x2C, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (REG_FRC_BANK_BASE + (((MS_U16)bank << 8) | (MS_U16)(addr… macro
108 #define REG_FRC_BK2C_00_H FRC_PK_H_(0x2C, 0x00)
110 #define REG_FRC_BK2C_01_H FRC_PK_H_(0x2C, 0x01)
112 #define REG_FRC_BK2C_02_H FRC_PK_H_(0x2C, 0x02)
114 #define REG_FRC_BK2C_03_H FRC_PK_H_(0x2C, 0x03)
116 #define REG_FRC_BK2C_04_H FRC_PK_H_(0x2C, 0x04)
118 #define REG_FRC_BK2C_05_H FRC_PK_H_(0x2C, 0x05)
120 #define REG_FRC_BK2C_06_H FRC_PK_H_(0x2C, 0x06)
122 #define REG_FRC_BK2C_07_H FRC_PK_H_(0x2C, 0x07)
124 #define REG_FRC_BK2C_08_H FRC_PK_H_(0x2C, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (REG_FRC_BANK_BASE + (((MS_U16)bank << 8) | (MS_U16)(addr… macro
108 #define REG_FRC_BK22C_00_H FRC_PK_H_(0x22C, 0x00)
110 #define REG_FRC_BK22C_01_H FRC_PK_H_(0x22C, 0x01)
112 #define REG_FRC_BK22C_02_H FRC_PK_H_(0x22C, 0x02)
114 #define REG_FRC_BK22C_03_H FRC_PK_H_(0x22C, 0x03)
116 #define REG_FRC_BK22C_04_H FRC_PK_H_(0x22C, 0x04)
118 #define REG_FRC_BK22C_05_H FRC_PK_H_(0x22C, 0x05)
120 #define REG_FRC_BK22C_06_H FRC_PK_H_(0x22C, 0x06)
122 #define REG_FRC_BK22C_07_H FRC_PK_H_(0x22C, 0x07)
124 #define REG_FRC_BK22C_08_H FRC_PK_H_(0x22C, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (REG_FRC_BANK_BASE + (((MS_U16)bank << 8) | (MS_U16)(addr… macro
108 #define REG_FRC_BK22C_00_H FRC_PK_H_(0x22C, 0x00)
110 #define REG_FRC_BK22C_01_H FRC_PK_H_(0x22C, 0x01)
112 #define REG_FRC_BK22C_02_H FRC_PK_H_(0x22C, 0x02)
114 #define REG_FRC_BK22C_03_H FRC_PK_H_(0x22C, 0x03)
116 #define REG_FRC_BK22C_04_H FRC_PK_H_(0x22C, 0x04)
118 #define REG_FRC_BK22C_05_H FRC_PK_H_(0x22C, 0x05)
120 #define REG_FRC_BK22C_06_H FRC_PK_H_(0x22C, 0x06)
122 #define REG_FRC_BK22C_07_H FRC_PK_H_(0x22C, 0x07)
124 #define REG_FRC_BK22C_08_H FRC_PK_H_(0x22C, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (REG_FRC_BANK_BASE + (((MS_U16)bank << 8) | (MS_U16)(addr… macro
108 #define REG_FRC_BK22C_00_H FRC_PK_H_(0x22C, 0x00)
110 #define REG_FRC_BK22C_01_H FRC_PK_H_(0x22C, 0x01)
112 #define REG_FRC_BK22C_02_H FRC_PK_H_(0x22C, 0x02)
114 #define REG_FRC_BK22C_03_H FRC_PK_H_(0x22C, 0x03)
116 #define REG_FRC_BK22C_04_H FRC_PK_H_(0x22C, 0x04)
118 #define REG_FRC_BK22C_05_H FRC_PK_H_(0x22C, 0x05)
120 #define REG_FRC_BK22C_06_H FRC_PK_H_(0x22C, 0x06)
122 #define REG_FRC_BK22C_07_H FRC_PK_H_(0x22C, 0x07)
124 #define REG_FRC_BK22C_08_H FRC_PK_H_(0x22C, 0x08)
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/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_frc_map.h99 #define FRC_PK_H_( bank, addr) (REG_FRC_BANK_BASE + (((MS_U16)bank << 8) | (MS_U16)(addr… macro
108 #define REG_FRC_BK22C_00_H FRC_PK_H_(0x22C, 0x00)
110 #define REG_FRC_BK22C_01_H FRC_PK_H_(0x22C, 0x01)
112 #define REG_FRC_BK22C_02_H FRC_PK_H_(0x22C, 0x02)
114 #define REG_FRC_BK22C_03_H FRC_PK_H_(0x22C, 0x03)
116 #define REG_FRC_BK22C_04_H FRC_PK_H_(0x22C, 0x04)
118 #define REG_FRC_BK22C_05_H FRC_PK_H_(0x22C, 0x05)
120 #define REG_FRC_BK22C_06_H FRC_PK_H_(0x22C, 0x06)
122 #define REG_FRC_BK22C_07_H FRC_PK_H_(0x22C, 0x07)
124 #define REG_FRC_BK22C_08_H FRC_PK_H_(0x22C, 0x08)
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