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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo_context.c251 MS_BOOL ret= FALSE; in mvideo_sc_variable_init()
252 if(pXCResourcePrivate->stdrvXC_MVideo._bSkipSWReset == FALSE) in mvideo_sc_variable_init()
313 if(ret == FALSE) in mvideo_sc_variable_init()
338 if(ret == FALSE) in mvideo_sc_variable_init()
374 if(ret == FALSE) in mvideo_sc_variable_init()
399 if(ret == FALSE) in mvideo_sc_variable_init()
421 pXCResourcePrivate->stdrvXC_MVideo._SContext.bEnableFPLLManualDebug = FALSE; in mvideo_sc_variable_init()
429 gSrcInfo[MAIN_WINDOW].bEn3DNR = FALSE; in mvideo_sc_variable_init()
430 gSrcInfo[MAIN_WINDOW].bUseYUVSpace = FALSE; in mvideo_sc_variable_init()
431 gSrcInfo[MAIN_WINDOW].bMemYUVFmt = FALSE; in mvideo_sc_variable_init()
[all …]
/utopia/UTPA2-700.0.x/modules/dscmb/drv/ca2/
H A DdrvCA.c129 static MS_BOOL _bCADrv_Inited = FALSE;
131 static MS_BOOL _bBGCDrv_Inited = FALSE;
132 static MS_BOOL _bCASTRDrv_Inited = FALSE;
192 if (FALSE == MDrv_MMIO_GetBASE(&ptrRegBank, &u32BankSize, MS_MODULE_HW)) in _MDrv_CA_Init()
195 return FALSE; in _MDrv_CA_Init()
200 if(HAL_CA_Init() == FALSE) in _MDrv_CA_Init()
203 return FALSE; in _MDrv_CA_Init()
207 _bBGCDrv_Inited = FALSE; in _MDrv_CA_Init()
221 DRV_CA_INIT_CHECK(FALSE); in _MDrv_CA_OTP_EnableSecureBoot()
232 DRV_CA_INIT_CHECK(FALSE); in _MDrv_CA_OTP_IsSecureBootEnabled()
[all …]
/utopia/UTPA2-700.0.x/modules/dscmb/drv/dscmb2/
H A DdrvDSCMB.c144 static MS_BOOL _bDSCMB2Drv_Inited = FALSE;
145 static MS_BOOL _bKLDrv_Inited = FALSE;
236 return FALSE ; in _DSCMB_SlotAlloc()
250 return FALSE; in _DSCMB_SlotFree()
268 return FALSE ; in _DSCMB_SlotRIVAlloc()
283 return FALSE; in _DSCMB_SlotRIVFree()
306 return FALSE ; in _DSCMB_Dscmb2Flt()
341 if(FALSE == HAL_DSCMB_PidIdx_EnableSlot(i)) in _DSCMB_EnableDSCMB()
344 return FALSE; in _DSCMB_EnableDSCMB()
365 if(FALSE == HAL_DSCMB_PidIdx_DisableSlot(i)) in _DSCMB_DisableDSCMB()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/api/audio/
H A DapiAUDIO_v2.c159 return FALSE; in _AUDIO_IOCtrlOpen()
176 if(_AUDIO_IOCtrlOpen() == FALSE) in MApi_AUDIO_Initialize()
189 return FALSE; in MApi_AUDIO_Initialize()
217 if(_AUDIO_IOCtrlOpen() == FALSE) in MApi_AUDIO_SetPowerOn()
246 if(_AUDIO_IOCtrlOpen() == FALSE) in MApi_AUDIO_SetDspBaseAddr()
274 if(_AUDIO_IOCtrlOpen() == FALSE) in MApi_AUDIO_GetDspMadBaseAddr()
302 if(_AUDIO_IOCtrlOpen() == FALSE) in MApi_AUDIO_WriteDecMailBox()
327 if(_AUDIO_IOCtrlOpen() == FALSE) in MApi_AUDIO_TriggerSifPLL()
358 if(_AUDIO_IOCtrlOpen() == FALSE) in MDrv_AUDIO_SetDspBaseAddr()
386 if(_AUDIO_IOCtrlOpen() == FALSE) in MDrv_AUDIO_GetDspMadBaseAddr()
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/mustang/pws/
H A Dmhal_pws_setting_info_table.h18 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
19 {0x102509, 0x08/*, 0xB979*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
20 {0x102509, 0x10/*, 0xB9F9*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
21 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
22 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
23 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
24 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
25 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
26 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
27 {0x102508, 0x04/*, 0x3839*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/msos/msos/ucos/
H A DMsOS_ucos.c178 MS_BOOL bInitTaskTable = FALSE;
319 static MS_BOOL bTimerTask = FALSE;
400 return FALSE; in MDrv_MSOS_GetLibVer()
419 _MsOS_MemoryPool_Info[u32I].bUsed = FALSE; in MsOS_Init()
423 _MsOS_FixSizeMemoryPool_Info[u32I].bUsed = FALSE; in MsOS_Init()
426 if ((bInitTaskTable == FALSE) || (pUserDefineTask == NULL)) in MsOS_Init()
430 _MsOS_Task_Info[u32I].bUsed = FALSE; in MsOS_Init()
443 _MsOS_Mutex_Info[u32I].bUsed = FALSE; in MsOS_Init()
447 _MsOS_Semaphore_Info[u32I].bUsed = FALSE; in MsOS_Init()
451 _MsOS_EventGroup_Info[u32I].bUsed = FALSE; in MsOS_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/maldives/flash/serial/
H A DhalSERFLASH.c212 MS_BOOL bDetect = FALSE; // initial flasg : true and false
213 MS_BOOL _bIBPM = FALSE; // Individual Block Protect mode : true and false
1349 …IZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1351 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1353 …00, 32, SIZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1358 …00, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1361 …E_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ATMEL, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1362 …E_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ATMEL, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1363 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1364 …IZE_64KB, 256, 384, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/macan/pws/
H A Dmhal_pws_setting_info_table.h18 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
19 {0x102509, 0x08/*, 0xB97D*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
20 {0x102509, 0x10/*, 0xB9FD*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
21 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
22 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
23 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
24 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
25 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
26 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
27 {0x102508, 0x04/*, 0x383D*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/M7821/pws/
H A Dmhal_pws_setting_info_table.h19 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
20 {0x102509, 0x08/*, 0xB97D*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
21 {0x102509, 0x10/*, 0xB9FD*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
22 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
23 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
24 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
25 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
26 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
27 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
28 {0x102508, 0x04/*, 0x383D*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/maserati/pws/
H A Dmhal_pws_setting_info_table.h18 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
19 {0x102509, 0x08/*, 0xB97D*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
20 {0x102509, 0x10/*, 0xB9FD*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
21 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
22 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
23 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
24 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
25 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
26 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
27 {0x102508, 0x04/*, 0x383D*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7821/hwi2c/
H A DhalHWI2C.c261 return FALSE; in HAL_HWI2C_WriteByte()
281 return FALSE; in HAL_HWI2C_Write2Byte()
301 return FALSE; in HAL_HWI2C_Write4Byte()
324 return FALSE; in HAL_HWI2C_WriteRegBit()
347 return FALSE; in HAL_HWI2C_WriteByteMask()
499 return FALSE; in HAL_HWI2C_DMA_SetMiuPri()
500 bHighPri = (eMiuPri==E_HAL_HWI2C_DMA_PRI_HIGH)? TRUE : FALSE; in HAL_HWI2C_DMA_SetMiuPri()
519 if(HAL_HWI2C_GetPortIdxByOffset(u32PortOffset,&u8Port)==FALSE) in HAL_HWI2C_DMA_SetMiuAddr()
520 return FALSE; in HAL_HWI2C_DMA_SetMiuAddr()
568 bTxNoStop = (bEnable)? FALSE : TRUE; in HAL_HWI2C_DMA_SetTxfrStop()
[all …]
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maserati/hwi2c/
H A DhalHWI2C.c261 return FALSE; in HAL_HWI2C_WriteByte()
281 return FALSE; in HAL_HWI2C_Write2Byte()
301 return FALSE; in HAL_HWI2C_Write4Byte()
324 return FALSE; in HAL_HWI2C_WriteRegBit()
347 return FALSE; in HAL_HWI2C_WriteByteMask()
499 return FALSE; in HAL_HWI2C_DMA_SetMiuPri()
500 bHighPri = (eMiuPri==E_HAL_HWI2C_DMA_PRI_HIGH)? TRUE : FALSE; in HAL_HWI2C_DMA_SetMiuPri()
519 if(HAL_HWI2C_GetPortIdxByOffset(u32PortOffset,&u8Port)==FALSE) in HAL_HWI2C_DMA_SetMiuAddr()
520 return FALSE; in HAL_HWI2C_DMA_SetMiuAddr()
568 bTxNoStop = (bEnable)? FALSE : TRUE; in HAL_HWI2C_DMA_SetTxfrStop()
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/kano/flash/serial/
H A DhalSERFLASH.c228 MS_BOOL bDetect = FALSE; // initial flasg : true and false
229 MS_BOOL _bIBPM = FALSE; // Individual Block Protect mode : true and false
1050 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1052 …00000, 32, SIZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1053 …00000, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1057 …00, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1060 …IZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1061 …E_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ATMEL, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1062 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1063 …IZE_64KB, 256, 384, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/k6/flash/serial/
H A DhalSERFLASH.c228 MS_BOOL bDetect = FALSE; // initial flasg : true and false
229 MS_BOOL _bIBPM = FALSE; // Individual Block Protect mode : true and false
1050 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1052 …00000, 32, SIZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1053 …00000, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1057 …00, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1060 …IZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1061 …E_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ATMEL, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1062 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1063 …IZE_64KB, 256, 384, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/curry/flash/serial/
H A DhalSERFLASH.c230 MS_BOOL bDetect = FALSE; // initial flasg : true and false
231 MS_BOOL _bIBPM = FALSE; // Individual Block Protect mode : true and false
1052 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1054 …00000, 32, SIZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1055 …00000, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1059 …00, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1062 …IZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1063 …E_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ATMEL, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1064 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1065 …IZE_64KB, 256, 384, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
[all …]
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maxim/hwi2c/
H A DhalHWI2C.c261 return FALSE; in HAL_HWI2C_WriteByte()
281 return FALSE; in HAL_HWI2C_Write2Byte()
301 return FALSE; in HAL_HWI2C_Write4Byte()
324 return FALSE; in HAL_HWI2C_WriteRegBit()
347 return FALSE; in HAL_HWI2C_WriteByteMask()
499 return FALSE; in HAL_HWI2C_DMA_SetMiuPri()
500 bHighPri = (eMiuPri==E_HAL_HWI2C_DMA_PRI_HIGH)? TRUE : FALSE; in HAL_HWI2C_DMA_SetMiuPri()
519 if(HAL_HWI2C_GetPortIdxByOffset(u32PortOffset,&u8Port)==FALSE) in HAL_HWI2C_DMA_SetMiuAddr()
520 return FALSE; in HAL_HWI2C_DMA_SetMiuAddr()
568 bTxNoStop = (bEnable)? FALSE : TRUE; in HAL_HWI2C_DMA_SetTxfrStop()
[all …]
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7621/hwi2c/
H A DhalHWI2C.c261 return FALSE; in HAL_HWI2C_WriteByte()
281 return FALSE; in HAL_HWI2C_Write2Byte()
301 return FALSE; in HAL_HWI2C_Write4Byte()
324 return FALSE; in HAL_HWI2C_WriteRegBit()
347 return FALSE; in HAL_HWI2C_WriteByteMask()
499 return FALSE; in HAL_HWI2C_DMA_SetMiuPri()
500 bHighPri = (eMiuPri==E_HAL_HWI2C_DMA_PRI_HIGH)? TRUE : FALSE; in HAL_HWI2C_DMA_SetMiuPri()
519 if(HAL_HWI2C_GetPortIdxByOffset(u32PortOffset,&u8Port)==FALSE) in HAL_HWI2C_DMA_SetMiuAddr()
520 return FALSE; in HAL_HWI2C_DMA_SetMiuAddr()
568 bTxNoStop = (bEnable)? FALSE : TRUE; in HAL_HWI2C_DMA_SetTxfrStop()
[all …]
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/manhattan/hwi2c/
H A DhalHWI2C.c261 return FALSE; in HAL_HWI2C_WriteByte()
281 return FALSE; in HAL_HWI2C_Write2Byte()
301 return FALSE; in HAL_HWI2C_Write4Byte()
324 return FALSE; in HAL_HWI2C_WriteRegBit()
347 return FALSE; in HAL_HWI2C_WriteByteMask()
499 return FALSE; in HAL_HWI2C_DMA_SetMiuPri()
500 bHighPri = (eMiuPri==E_HAL_HWI2C_DMA_PRI_HIGH)? TRUE : FALSE; in HAL_HWI2C_DMA_SetMiuPri()
519 if(HAL_HWI2C_GetPortIdxByOffset(u32PortOffset,&u8Port)==FALSE) in HAL_HWI2C_DMA_SetMiuAddr()
520 return FALSE; in HAL_HWI2C_DMA_SetMiuAddr()
568 bTxNoStop = (bEnable)? FALSE : TRUE; in HAL_HWI2C_DMA_SetTxfrStop()
[all …]
/utopia/UTPA2-700.0.x/modules/dscmb/drv/dscmb/
H A DdrvDSCMB.c171 return FALSE; in _DSCMB_SlotAlloc()
211 if (FALSE == MDrv_MMIO_GetBASE(&u32Bank, &phyBankSize, MS_MODULE_HW)) in _MDrv_DSCMB_Init()
214 return FALSE; in _MDrv_DSCMB_Init()
225 if (FALSE == MDrv_MMIO_GetBASE(&u32OTPBank, &phyOTPBankSize, MS_MODULE_OTP)) in _MDrv_DSCMB_Init()
228 return FALSE; in _MDrv_DSCMB_Init()
235 if (FALSE == MDrv_MMIO_GetBASE(&u32PMBank, &phyPMBankSize, MS_MODULE_PM)) in _MDrv_DSCMB_Init()
238 return FALSE; in _MDrv_DSCMB_Init()
259 pMap->bUsed = FALSE; in _MDrv_DSCMB_Init()
290 return FALSE; in MDrv_DSCMB2_Init()
298 return FALSE; in MDrv_DSCMB2_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/manhattan/pws/
H A Dmhal_pws_setting_info_table.h18 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
19 {0x102509, 0x08/*, 0xB97D*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
20 {0x102509, 0x10/*, 0xB9FD*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
21 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
22 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
23 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
24 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
25 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
26 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
27 {0x102508, 0x04/*, 0x383D*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/maldives/pws/
H A Dmhal_pws_setting_info_table.h18 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
19 {0x102509, 0x08/*, 0xB97D*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
20 {0x102509, 0x10/*, 0xB9FD*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
21 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
22 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
23 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
24 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
25 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
26 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
27 {0x102508, 0x04/*, 0x383D*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/maxim/pws/
H A Dmhal_pws_setting_info_table.h18 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
19 {0x102509, 0x08/*, 0xB979*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
20 {0x102509, 0x10/*, 0xB9F9*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
21 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
22 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
23 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
24 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
25 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
26 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
27 {0x102508, 0x04/*, 0x3839*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/M7621/pws/
H A Dmhal_pws_setting_info_table.h19 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
20 {0x102509, 0x08/*, 0xB979*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
21 {0x102509, 0x10/*, 0xB9F9*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
22 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
23 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
24 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
25 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
26 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
27 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
28 {0x102508, 0x04/*, 0x3839*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/mainz/pws/
H A Dmhal_pws_setting_info_table.h96 {0x102509, 0x04/*, 0xFE3F*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_RGB"},
97 {0x102509, 0x08/*, 0xB979*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDY"},
98 {0x102509, 0x10/*, 0xB9F9*/ /*off=0x01, on=0x00*/, FALSE, "PD_ICLP_VDC"},
99 {0x10250a, 0x04/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_DAC"},
100 {0x10250A, 0x08/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MAIN"},
101 {0x10257E, 0x01/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOG_MUX"},
102 {0x10250A, 0x10/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_DAC"},
103 {0x10250A, 0x20/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MAIN"},
104 {0x10257e, 0x02/*, 0xFEBF*/ /*off=0x01, on=0x00*/, FALSE, "PD_SOGOFF_MUX"},
105 {0x102508, 0x04/*, 0x3839*/ /*off=0x01, on=0x00*/, FALSE, "PD_BG"},
[all …]
/utopia/UTPA2-700.0.x/modules/flash/hal/k6lite/flash/serial/
H A DhalSERFLASH.c228 MS_BOOL bDetect = FALSE; // initial flasg : true and false
229 MS_BOOL _bIBPM = FALSE; // Individual Block Protect mode : true and false
1069 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1072 …00000, 32, SIZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1073 …00000, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1077 …00, 16, SIZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1080 …IZE_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1081 …E_64KB, 256, 50, BITS(5:2, 0x0F), ISP_DEV_ATMEL, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1082 …IZE_64KB, 256, 50, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
1083 …IZE_64KB, 256, 384, BITS(4:2, 0x07), ISP_DEV_ST, ISP_SPI_ENDIAN_LITTLE, FALSE, NULL},
[all …]

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