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Searched refs:BLK_CODEC_REG_BASE (Results 1 – 3 of 3) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DregVPU_EX.h485 #define BLK_CODEC_REG_BASE (0x71200) macro
488 #define REG_VDR2_D_ACCESS_RANGE0_CFG (BLK_CODEC_REG_BASE+(0x0020<<1))
504 #define REG_VDR2_D_ACCESS_RANGE1_CFG (BLK_CODEC_REG_BASE+(0x0021<<1))
520 #define REG_VDR2_D_ACCESS_RANGE2_CFG (BLK_CODEC_REG_BASE+(0x0022<<1))
524 #define REG_VDR2_D_ACCESS_RANGE3_CFG (BLK_CODEC_REG_BASE+(0x0023<<1))
528 #define REG_VDR2_D_ACCESS_RANGE_ADDR_L (BLK_CODEC_REG_BASE+(0x0024<<1))
529 #define REG_VDR2_D_ACCESS_RANGE_ADDR_H (BLK_CODEC_REG_BASE+(0x0025<<1))
530 #define REG_VDR2_D_ACCESS_RANGE_STS_L (BLK_CODEC_REG_BASE+(0x0026<<1))
531 #define REG_VDR2_D_ACCESS_RANGE_STS_H (BLK_CODEC_REG_BASE+(0x0027<<1))
534 #define REG_VDR2_I_ACCESS_RANGE0_CFG (BLK_CODEC_REG_BASE+(0x0028<<1))
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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DregVPU_EX.h485 #define BLK_CODEC_REG_BASE (0x71200) macro
488 #define REG_VDR2_D_ACCESS_RANGE0_CFG (BLK_CODEC_REG_BASE+(0x0020<<1))
504 #define REG_VDR2_D_ACCESS_RANGE1_CFG (BLK_CODEC_REG_BASE+(0x0021<<1))
520 #define REG_VDR2_D_ACCESS_RANGE2_CFG (BLK_CODEC_REG_BASE+(0x0022<<1))
524 #define REG_VDR2_D_ACCESS_RANGE3_CFG (BLK_CODEC_REG_BASE+(0x0023<<1))
528 #define REG_VDR2_D_ACCESS_RANGE_ADDR_L (BLK_CODEC_REG_BASE+(0x0024<<1))
529 #define REG_VDR2_D_ACCESS_RANGE_ADDR_H (BLK_CODEC_REG_BASE+(0x0025<<1))
530 #define REG_VDR2_D_ACCESS_RANGE_STS_L (BLK_CODEC_REG_BASE+(0x0026<<1))
531 #define REG_VDR2_D_ACCESS_RANGE_STS_H (BLK_CODEC_REG_BASE+(0x0027<<1))
534 #define REG_VDR2_I_ACCESS_RANGE0_CFG (BLK_CODEC_REG_BASE+(0x0028<<1))
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DregVPU_EX.h485 #define BLK_CODEC_REG_BASE (0x71200) macro
488 #define REG_VDR2_D_ACCESS_RANGE0_CFG (BLK_CODEC_REG_BASE+(0x0020<<1))
504 #define REG_VDR2_D_ACCESS_RANGE1_CFG (BLK_CODEC_REG_BASE+(0x0021<<1))
520 #define REG_VDR2_D_ACCESS_RANGE2_CFG (BLK_CODEC_REG_BASE+(0x0022<<1))
524 #define REG_VDR2_D_ACCESS_RANGE3_CFG (BLK_CODEC_REG_BASE+(0x0023<<1))
528 #define REG_VDR2_D_ACCESS_RANGE_ADDR_L (BLK_CODEC_REG_BASE+(0x0024<<1))
529 #define REG_VDR2_D_ACCESS_RANGE_ADDR_H (BLK_CODEC_REG_BASE+(0x0025<<1))
530 #define REG_VDR2_D_ACCESS_RANGE_STS_L (BLK_CODEC_REG_BASE+(0x0026<<1))
531 #define REG_VDR2_D_ACCESS_RANGE_STS_H (BLK_CODEC_REG_BASE+(0x0027<<1))
534 #define REG_VDR2_I_ACCESS_RANGE0_CFG (BLK_CODEC_REG_BASE+(0x0028<<1))
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