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Searched refs:BK_COMB_10 (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c3657 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3677 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3699 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3718 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
4327 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
4342 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c7019 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7039 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7061 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7080 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7689 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7704 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7165 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7187 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7206 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7818 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7833 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7165 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7187 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7206 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7818 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7833 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7092 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7112 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7134 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7153 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7765 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7780 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7165 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7187 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7206 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7818 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7833 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c7019 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7039 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7061 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7080 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7689 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7704 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c3657 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3677 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3699 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3718 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
4327 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
4342 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7165 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7187 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7206 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7818 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7833 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7145 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7165 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7187 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7206 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7818 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7833 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c3656 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3676 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3698 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
3717 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
4326 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
4341 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c7035 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7055 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7077 RIU_WriteRegBit (BK_COMB_10, ENABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7096 RIU_WriteRegBit (BK_COMB_10, DISABLE, BIT(7)); // <- SET COMB in HAL_AVD_AFEC_SetInput()
7708 RIU_WriteByteMask( BK_COMB_10, 0x07, 0x07 ); in HAL_AVD_COMB_Set3dComb()
7723 RIU_WriteByteMask( BK_COMB_10, 0x02, 0x07 ); // 0x12 is recommended by designer in HAL_AVD_COMB_Set3dComb()
H A DregAVD.h426 #define BK_COMB_10 (COMB_REG_BASE+0x10) macro
/utopia/UTPA2-700.0.x/modules/vd/drv/avd/
H A DAVD.c1153 HAL_AVD_SetReg(BK_COMB_10,(HAL_AVD_GetReg(BK_COMB_10)|0x80)); in _Drv_AVD_SCART_Monitor()
1196 HAL_AVD_SetReg(BK_COMB_10,(HAL_AVD_GetReg(BK_COMB_10)&0x7F)); in _Drv_AVD_SCART_Monitor()

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