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Searched refs:BK_AFEC_40 (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c3768 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
3769 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
3778 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
3779 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
3794 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
3795 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c7130 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7131 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7140 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7141 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7156 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7157 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7256 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7257 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7266 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7267 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7282 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7283 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7256 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7257 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7266 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7267 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7282 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7283 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7203 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7204 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7213 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7214 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7229 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7230 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7256 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7257 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7266 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7267 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7282 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7283 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c7130 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7131 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7140 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7141 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7156 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7157 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c3768 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
3769 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
3778 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
3779 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
3794 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
3795 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7256 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7257 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7266 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7267 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7282 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7283 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7256 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7257 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7266 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7267 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7282 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7283 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c3767 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
3768 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
3777 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
3778 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
3793 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
3794 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c7146 …RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move … in HAL_AVD_AFEC_SetInput()
7147 RIU_WriteRegBit(BK_AFEC_40,ENABLE,BIT(7)); // enable VIF in hardware in HAL_AVD_AFEC_SetInput()
7156 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7157 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
7172 …RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(4)); // BY 20090630 put gain setting temporarily, TODO move… in HAL_AVD_AFEC_SetInput()
7173 RIU_WriteRegBit(BK_AFEC_40,DISABLE,BIT(7)); // disable VIF in hardware in HAL_AVD_AFEC_SetInput()
H A DregAVD.h213 #define BK_AFEC_40 (AFEC_REG_BASE+0x40) macro
/utopia/UTPA2-700.0.x/modules/vd/drv/avd/
H A DAVD.c1629 RIU_WriteByte(BK_AFEC_40, 0x91); in Drv_AVD_Init()
3068 u8temp = HAL_AVD_GetReg(BK_AFEC_40); in Drv_AVD_SetAutoFineGainToFixed()
3070 HAL_AVD_SetReg(BK_AFEC_40,u8temp |(u8LPFGain & BIT(2))); //AFEC_40[4]LPF gain in Drv_AVD_SetAutoFineGainToFixed()
3317 u8temp = HAL_AVD_GetReg(BK_AFEC_40); in Drv_AVD_GetDSPFineGain()
3319 HAL_AVD_SetReg(BK_AFEC_40,u8temp |(u8LPFGain & BIT(2))); //AFEC_40[4]LPF gain in Drv_AVD_GetDSPFineGain()

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