Home
last modified time | relevance | path

Searched refs:BK_AFEC_20 (Results 1 – 25 of 26) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c3771 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
3781 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
3797 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c7133 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7143 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7159 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7259 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7269 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7285 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7259 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7269 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7285 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7206 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7216 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7232 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7259 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7269 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7285 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c7133 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7143 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7159 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c3771 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
3781 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
3797 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7259 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7269 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7285 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7259 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7269 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7285 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c3770 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
3780 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
3796 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c7149 RIU_WriteByte(BK_AFEC_20,0xBC); in HAL_AVD_AFEC_SetInput()
7159 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
7175 RIU_WriteByte(BK_AFEC_20,0xB0); in HAL_AVD_AFEC_SetInput()
H A DregAVD.h181 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h517 #define BK_AFEC_20 (AFEC_REG_BASE+0x20) macro

12