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Searched refs:BK_AFEC_1F (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c3662 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
3682 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
3704 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
3723 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c7024 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7044 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7066 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7085 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7150 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7170 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7192 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7211 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7150 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7170 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7192 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7211 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7097 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7117 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7139 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7158 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7150 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7170 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7192 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7211 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c7024 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7044 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7066 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7085 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c3662 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
3682 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
3704 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
3723 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7150 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7170 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7192 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7211 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7150 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7170 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7192 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7211 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c3661 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
3681 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
3703 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
3722 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c7040 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7060 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
7082 RIU_WriteRegBit( BK_AFEC_1F, ENABLE, BIT(7)); // Enable clamp C in HAL_AVD_AFEC_SetInput()
7101 RIU_WriteRegBit( BK_AFEC_1F, DISABLE, BIT(7)); // disable clamp C in HAL_AVD_AFEC_SetInput()
H A DregAVD.h180 #define BK_AFEC_1F (AFEC_REG_BASE+0x1F) macro
/utopia/UTPA2-700.0.x/modules/vd/drv/avd/
H A DAVD.c1154 HAL_AVD_SetReg(BK_AFEC_1F,(HAL_AVD_GetReg(BK_AFEC_1F)|0x80)); in _Drv_AVD_SCART_Monitor()
1197 HAL_AVD_SetReg(BK_AFEC_1F,(HAL_AVD_GetReg(BK_AFEC_1F)&0x7F)); in _Drv_AVD_SCART_Monitor()

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