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Searched refs:AUDIO_R2_DMA_RDER_CFG_REG (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/audio/hal/mainz/audio/
H A DhalAUDIO.c163 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
10014 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10048 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10051 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10052 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10058 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10063 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10068 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10073 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10077 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/messi/audio/
H A DhalAUDIO.c163 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
9998 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10032 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10035 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10036 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10042 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10047 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10052 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10057 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
10061 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/mooney/audio/
H A DhalAUDIO.c200 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11147 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11181 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11184 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11185 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11191 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11196 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11201 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11206 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11210 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/M7821/audio/
H A DhalAUDIO.c165 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
12129 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12163 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12166 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12167 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12173 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12178 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12183 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12188 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12192 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6/audio/
H A DhalAUDIO.c206 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11854 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11888 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11891 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11892 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11898 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11903 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11908 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11913 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11917 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/M7621/audio/
H A DhalAUDIO.c204 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11492 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11526 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11529 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11530 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11536 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11541 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11546 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11551 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11555 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maxim/audio/
H A DhalAUDIO.c204 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11665 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11699 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11702 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11703 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11709 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11714 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11719 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11724 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11728 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/k6lite/audio/
H A DhalAUDIO.c207 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11708 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11742 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11745 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11746 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11752 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11757 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11762 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11767 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11771 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/curry/audio/
H A DhalAUDIO.c204 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11162 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11196 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11199 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11200 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11206 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11211 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11216 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11221 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11225 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/kano/audio/
H A DhalAUDIO.c206 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11168 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11202 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11205 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11206 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11212 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11217 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11222 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11227 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11231 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maserati/audio/
H A DhalAUDIO.c165 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
12254 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12288 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12291 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12292 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12298 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12303 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12308 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12313 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12317 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/audio/hal/maldives/audio/
H A DhalAUDIO.c204 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11528 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11566 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11569 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11570 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11576 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11581 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11586 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11591 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11595 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
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/utopia/UTPA2-700.0.x/modules/audio/hal/mustang/audio/
H A DhalAUDIO.c204 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
12263 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12301 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12304 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12305 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12311 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12316 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12321 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12326 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
12330 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
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/utopia/UTPA2-700.0.x/modules/audio/hal/macan/audio/
H A DhalAUDIO.c203 #define AUDIO_R2_DMA_RDER_CFG_REG(base, offset) ((MS_U32)(base + (offset * 2))) macro
11814 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x7FFF, 0x0000); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11852 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 3), 0xFFFF, (u32TargetBufferS… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11855 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 5), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11856 …HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 6), 0xFFFF, ((u32TargetBuffer… in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11862 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x00); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11867 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11872 HAL_AUR2_WriteMaskByte(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x80, 0x80); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11877 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 7), 0xFFFF, u16Val); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
11881 HAL_AUR2_WriteMaskReg(AUDIO_R2_DMA_RDER_CFG_REG(R2_DMARDR1_REG_BASE, 0), 0x0860, 0x0020); in HAL_AUDIO_PCM_R2Dma_Reader1_Apply_Setting()
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