Searched refs:tile (Results 1 – 2 of 2) sorted by relevance
799 static void h265e_code_skip_tile(void *ctx, H265eSlice *slice, MppWriteCtx *bitIf, TileInfo *tile) in h265e_code_skip_tile() argument807 RK_U32 offset_x = tile->tile_start_x; in h265e_code_skip_tile()808 RK_U32 offset_y = tile->tile_start_y; in h265e_code_skip_tile()818 h265e_code_slice_header(slice, bitIf, tile->ctu_addr); in h265e_code_skip_tile()824 cu.tile_start_x = tile->tile_start_x; in h265e_code_skip_tile()825 cu.tile_end_x = tile->tile_end_x; in h265e_code_skip_tile()826 cu.tile_end_y = tile->tile_end_y; in h265e_code_skip_tile()827 for (cu_cnt = 0; cu_cnt < tile->mb_total - 1; cu_cnt++) { in h265e_code_skip_tile()835 if (offset_x > tile->tile_end_x) { in h265e_code_skip_tile()836 offset_x = tile->tile_start_x; in h265e_code_skip_tile()[all …]
126 - [h265e]: Correct tile syntax elements at PPS201 - [mpp_sys_cfg]: Add raster/tile/fbc buffer alignment223 - [jpegd_rkv]: New JPEG IP supports tile 4x4 output by default.346 - [h265]: fix pskip when enable tile mode369 - [h265]: unify calculation tile width519 - [mpp_frame]: Add tile format flag628 - [h265e_vepu580]: flush cache for the first tile696 - [h265e_vepu580]: fix tile mode cfg