Searched refs:sw_dmmv_wr_en (Results 1 – 2 of 2) sorted by relevance
165 regs->reg57_enable_ctrl.sw_dmmv_wr_en = 0; in vdpu2_mpg4d_setup_regs_by_syntax()187 regs->reg57_enable_ctrl.sw_dmmv_wr_en = 1; in vdpu2_mpg4d_setup_regs_by_syntax()199 regs->reg57_enable_ctrl.sw_dmmv_wr_en = 0; in vdpu2_mpg4d_setup_regs_by_syntax()
102 RK_U32 sw_dmmv_wr_en : 1; member