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Searched refs:reg57_enable_ctrl (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/mpg4d/
H A Dhal_m4vd_vdpu2.c138 regs->reg57_enable_ctrl.sw_pic_type_sel1 = 1; in vdpu2_mpg4d_setup_regs_by_syntax()
139 regs->reg57_enable_ctrl.sw_pic_type_sel0 = 1; in vdpu2_mpg4d_setup_regs_by_syntax()
165 regs->reg57_enable_ctrl.sw_dmmv_wr_en = 0; in vdpu2_mpg4d_setup_regs_by_syntax()
172 regs->reg57_enable_ctrl.sw_pic_type_sel1 = 0; in vdpu2_mpg4d_setup_regs_by_syntax()
173 regs->reg57_enable_ctrl.sw_pic_type_sel0 = 1; in vdpu2_mpg4d_setup_regs_by_syntax()
187 regs->reg57_enable_ctrl.sw_dmmv_wr_en = 1; in vdpu2_mpg4d_setup_regs_by_syntax()
191 regs->reg57_enable_ctrl.sw_pic_type_sel1 = 0; in vdpu2_mpg4d_setup_regs_by_syntax()
192 regs->reg57_enable_ctrl.sw_pic_type_sel0 = 0; in vdpu2_mpg4d_setup_regs_by_syntax()
199 regs->reg57_enable_ctrl.sw_dmmv_wr_en = 0; in vdpu2_mpg4d_setup_regs_by_syntax()
211 regs->reg57_enable_ctrl.sw_curpic_code_sel = 1; in vdpu2_mpg4d_setup_regs_by_syntax()
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H A Dhal_m4vd_vdpu2_reg.h117 } reg57_enable_ctrl; member
/rockchip-linux_mpp/mpp/hal/vpu/h263d/
H A Dhal_h263d_vdpu2.c97 regs->reg57_enable_ctrl.sw_pic_inter_e = 1; in vpu2_h263d_setup_regs_by_syntax()
108 regs->reg57_enable_ctrl.sw_pic_inter_e = 0; in vpu2_h263d_setup_regs_by_syntax()
207 regs->reg57_enable_ctrl.sw_dec_timeout_e = 1; in hal_vpu2_h263d_gen_regs()
208 regs->reg57_enable_ctrl.sw_dec_clk_gate_e = 1; in hal_vpu2_h263d_gen_regs()
209 regs->reg57_enable_ctrl.sw_dec_e = 1; in hal_vpu2_h263d_gen_regs()
H A Dhal_h263d_vdpu2_reg.h117 } reg57_enable_ctrl; member
/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu2.c59 reg->reg57_enable_ctrl.sw_dec_timeout_e = 1; in jpegd_regs_init()
60 reg->reg57_enable_ctrl.sw_dec_clk_gate_e = 1; in jpegd_regs_init()
595 reg->reg57_enable_ctrl.sw_dec_out_dis = 1; in jpegd_setup_pp()
611 reg->reg57_enable_ctrl.sw_dec_out_dis = 0; in jpegd_setup_pp()
644 reg->reg57_enable_ctrl.sw_dec_e = 1; /* Enable jpeg mode */ in jpegd_gen_regs()
645 reg->reg57_enable_ctrl.sw_pjpeg_e = 0; in jpegd_gen_regs()
646 reg->reg57_enable_ctrl.sw_dec_out_dis = 0; in jpegd_gen_regs()
647 reg->reg57_enable_ctrl.sw_rlc_mode_e = 0; in jpegd_gen_regs()
H A Dhal_jpegd_vdpu2_reg.h306 } reg57_enable_ctrl; member
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu2.c189 reg->reg57_enable_ctrl.sw_dec_timeout_e = 1; in hal_vp8_init_hwcfg()
190 reg->reg57_enable_ctrl.sw_dec_clk_gate_e = 1; in hal_vp8_init_hwcfg()
191 reg->reg57_enable_ctrl.sw_dec_out_dis = 0; in hal_vp8_init_hwcfg()
518 regs->reg57_enable_ctrl.sw_pic_inter_e = pic_param->frame_type; in hal_vp8d_vdpu2_gen_regs()
590 regs->reg57_enable_ctrl.sw_dec_e = 1; in hal_vp8d_vdpu2_gen_regs()
H A Dhal_vp8d_vdpu2_reg.h128 } reg57_enable_ctrl; member