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Searched refs:reg54_endian (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/h263d/
H A Dhal_h263d_vdpu2.c199 regs->reg54_endian.sw_dec_out_endian = 1; in hal_vpu2_h263d_gen_regs()
200 regs->reg54_endian.sw_dec_in_endian = 1; in hal_vpu2_h263d_gen_regs()
201 regs->reg54_endian.sw_dec_inswap32_e = 1; in hal_vpu2_h263d_gen_regs()
202 regs->reg54_endian.sw_dec_outswap32_e = 1; in hal_vpu2_h263d_gen_regs()
203 regs->reg54_endian.sw_dec_strswap32_e = 1; in hal_vpu2_h263d_gen_regs()
204 regs->reg54_endian.sw_dec_strendian_e = 1; in hal_vpu2_h263d_gen_regs()
H A Dhal_h263d_vdpu2_reg.h63 } reg54_endian; member
/rockchip-linux_mpp/mpp/hal/vpu/mpg4d/
H A Dhal_m4vd_vdpu2.c356 regs->reg54_endian.sw_dec_out_endian = 1; in vdpu2_mpg4d_gen_regs()
357 regs->reg54_endian.sw_dec_in_endian = 1; in vdpu2_mpg4d_gen_regs()
358 regs->reg54_endian.sw_dec_in_wordsp = 1; in vdpu2_mpg4d_gen_regs()
359 regs->reg54_endian.sw_dec_out_wordsp = 1; in vdpu2_mpg4d_gen_regs()
360 regs->reg54_endian.sw_dec_strswap32_e = 1; in vdpu2_mpg4d_gen_regs()
361 regs->reg54_endian.sw_dec_strendian_e = 1; in vdpu2_mpg4d_gen_regs()
H A Dhal_m4vd_vdpu2_reg.h63 } reg54_endian; member
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu2.c175 reg->reg54_endian.sw_dec_in_endian = 1; in hal_vp8_init_hwcfg()
176 reg->reg54_endian.sw_dec_out_endian = 1; in hal_vp8_init_hwcfg()
177 reg->reg54_endian.sw_dec_inswap32_e = 1; in hal_vp8_init_hwcfg()
178 reg->reg54_endian.sw_dec_outswap32_e = 1; in hal_vp8_init_hwcfg()
179 reg->reg54_endian.sw_dec_strswap32_e = 1; in hal_vp8_init_hwcfg()
180 reg->reg54_endian.sw_dec_strendian_e = 1; in hal_vp8_init_hwcfg()
H A Dhal_vp8d_vdpu2_reg.h73 } reg54_endian; member
/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu2.c45 reg->reg54_endian.sw_dec_in_endian = DEC_BIG_ENDIAN; in jpegd_regs_init()
46 reg->reg54_endian.sw_dec_out_endian = DEC_LITTLE_ENDIAN; in jpegd_regs_init()
47 reg->reg54_endian.sw_dec_strendian_e = DEC_LITTLE_ENDIAN; in jpegd_regs_init()
48 reg->reg54_endian.sw_dec_outswap32_e = DEC_LITTLE_ENDIAN; in jpegd_regs_init()
49 reg->reg54_endian.sw_dec_inswap32_e = 1; in jpegd_regs_init()
50 reg->reg54_endian.sw_dec_strswap32_e = 1; in jpegd_regs_init()
H A Dhal_jpegd_vdpu2_reg.h252 } reg54_endian; member