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Searched refs:reg41 (Results 1 – 5 of 5) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu2.c309 reg->reg41.sw_pp_clk_gate_e = 1; in jpegd_setup_pp()
310 reg->reg41.sw_pp_ahb_hlock_e = 1; in jpegd_setup_pp()
311 reg->reg41.sw_pp_data_disc_e = 1; in jpegd_setup_pp()
589 reg->reg41.sw_pp_pipeline_e = ctx->pp_info.pp_enable; in jpegd_setup_pp()
594 reg->reg41.sw_pp_pipeline_e = 1; in jpegd_setup_pp()
610 reg->reg41.sw_pp_pipeline_e = 0; in jpegd_setup_pp()
H A Dhal_jpegd_vdpu2_reg.h211 } reg41; member
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp_common.h468 } reg41; /* 0x00a4 */ member
812 } reg41; /* 0x02a4 */ member
1156 } reg41; /* 0x04a4 */ member
1500 } reg41; /* 0x06a4 */ member
H A Dvdpp2_reg.h629 } reg41; // 0x02A4 member
H A Dvdpp2.c720 dst_reg->sharp.reg41.sw_peaking2_ratio_n01 = peaking_ctrl_ratio_N01[2]; in set_shp_to_vdpp2_reg()
721 dst_reg->sharp.reg41.sw_peaking2_ratio_n12 = peaking_ctrl_ratio_N12[2]; in set_shp_to_vdpp2_reg()