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Searched refs:reg20 (Results 1 – 9 of 9) sorted by relevance

/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp_reg.h139 } reg20; // 0x0050 member
H A Dvdpp_common.h183 } reg20; /* 0x00D0 */ member
363 } reg20; /* 0x0050 */ member
707 } reg20; /* 0x0250 */ member
1051 } reg20; /* 0x0450 */ member
1395 } reg20; /* 0x0650 */ member
H A Dvdpp.c86 dst_reg->common.reg20.sw_vdpp_timeout_en = 1; in vdpp_params_to_reg()
87 dst_reg->common.reg20.sw_vdpp_timeout_cnt = 0x8FFFFFF; in vdpp_params_to_reg()
H A Dvdpp2_reg.h167 } reg20; // 0x0050 member
513 } reg20; // 0x0250 member
H A Dvdpp2.c680 dst_reg->sharp.reg20.sw_peaking0_ratio_n23 = peaking_ctrl_ratio_N23[0]; in set_shp_to_vdpp2_reg()
681 dst_reg->sharp.reg20.sw_peaking0_ratio_p01 = peaking_ctrl_ratio_P01[0]; in set_shp_to_vdpp2_reg()
1148 dst_reg->common.reg20.sw_vdpp_timeout_en = 1; in vdpp2_params_to_reg()
1149 dst_reg->common.reg20.sw_vdpp_timeout_cnt = 0x8FFFFFF; in vdpp2_params_to_reg()
/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu1.c86 reg->reg20.sw_ac2_code5_cnt = ac_ptr1->bits[4]; in jpegd_write_code_word_number()
87 reg->reg20.sw_ac2_code6_cnt = ac_ptr1->bits[5]; in jpegd_write_code_word_number()
88 reg->reg20.sw_ac2_code7_cnt = ac_ptr1->bits[6]; in jpegd_write_code_word_number()
89 reg->reg20.sw_ac2_code8_cnt = ac_ptr1->bits[7]; in jpegd_write_code_word_number()
H A Dhal_jpegd_vdpu1_reg.h444 } reg20; member
H A Dhal_jpegd_vdpu2_reg.h110 RK_U32 reg20; member
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu1_reg.h191 } reg20; member