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Searched refs:reg122 (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu2.c198 reg->reg122.sw_cb_ac_vlctable = s->ac_index[1]; in jpegd_set_chroma_table_id()
199 reg->reg122.sw_cr_ac_vlctable = s->ac_index[2]; in jpegd_set_chroma_table_id()
202 reg->reg122.sw_cb_ac_vlctable = 0; in jpegd_set_chroma_table_id()
204 reg->reg122.sw_cb_ac_vlctable = 1; in jpegd_set_chroma_table_id()
207 reg->reg122.sw_cr_ac_vlctable = 0; in jpegd_set_chroma_table_id()
209 reg->reg122.sw_cr_ac_vlctable = 1; in jpegd_set_chroma_table_id()
213 reg->reg122.sw_cb_dc_vlctable = s->dc_index[1]; in jpegd_set_chroma_table_id()
214 reg->reg122.sw_cr_dc_vlctable = s->dc_index[2]; in jpegd_set_chroma_table_id()
217 reg->reg122.sw_cb_dc_vlctable = 0; in jpegd_set_chroma_table_id()
219 reg->reg122.sw_cb_dc_vlctable = 1; in jpegd_set_chroma_table_id()
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H A Dhal_jpegd_vdpu2_reg.h402 } reg122; member
/rockchip-linux_mpp/mpp/hal/vpu/mpg4d/
H A Dhal_m4vd_vdpu2.c104 regs->reg122.sw_intradc_vlc_thr = pp->intra_dc_vlc_thr; in vdpu2_mpg4d_setup_regs_by_syntax()
106 regs->reg122.sw_sync_markers_en = 1; in vdpu2_mpg4d_setup_regs_by_syntax()
124 regs->reg122.sw_stream_start_word = start_bit_offset; in vdpu2_mpg4d_setup_regs_by_syntax()
127 regs->reg122.sw_vop_time_incr = pp->vop_time_increment_resolution; in vdpu2_mpg4d_setup_regs_by_syntax()
217 regs->reg122.sw_quant_type_1_en = pp->quant_type; in vdpu2_mpg4d_setup_regs_by_syntax()
H A Dhal_m4vd_vdpu2_reg.h211 } reg122; member
/rockchip-linux_mpp/mpp/hal/vpu/h263d/
H A Dhal_h263d_vdpu2.c70 regs->reg122.sw_sync_markers_en = 1; in vpu2_h263d_setup_regs_by_syntax()
89 regs->reg122.sw_stream_start_word = start_bit_offset; in vpu2_h263d_setup_regs_by_syntax()
93 regs->reg122.sw_vop_time_incr = pp->vop_time_increment_resolution; in vpu2_h263d_setup_regs_by_syntax()
H A Dhal_h263d_vdpu2_reg.h211 } reg122; member
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu2.c272 regs->reg122.sw_strm1_start_bit = pic_param->stream_start_bit; in hal_vp8d_dct_partition_cfg()
312 regs->reg122.sw_strm_start_bit = byte_offset * 8; in hal_vp8d_dct_partition_cfg()
549 regs->reg122.sw_boolean_value = pic_param->bool_value; in hal_vp8d_vdpu2_gen_regs()
550 regs->reg122.sw_boolean_range = pic_param->bool_range; in hal_vp8d_vdpu2_gen_regs()
H A Dhal_vp8d_vdpu2_reg.h220 } reg122; member