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Searched refs:pic_width_in_mbs (Results 1 – 13 of 13) sorted by relevance

/rockchip-linux_mpp/mpp/codec/enc/h264/
H A Dh264e_sps.h106 RK_S32 pic_width_in_mbs; member
H A Dh264e_sps.c200 sps->pic_width_in_mbs = aligned_w >> 4; in h264e_sps_update()
333 mpp_writer_put_ue(bit, sps->pic_width_in_mbs - 1); in h264e_sps_to_packet()
H A Dh264e_slice.c48 slice->mb_w = sps->pic_width_in_mbs; in h264e_slice_update()
/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu2_v2.c289 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in setup_intra_refresh()
350 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu2_gen_regs_v2()
359 mb_h = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu2_gen_regs_v2()
768 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu2_ret_task_v2()
H A Dhal_h264e_vepu1_v2.c300 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu1_gen_regs_v2()
309 mb_h = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu1_gen_regs_v2()
703 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu1_ret_task_v2()
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu541.c821 RK_S32 mb_w = sps->pic_width_in_mbs; in setup_vepu541_rc_base()
981 RK_U32 w = ctx->sps->pic_width_in_mbs * 16; in setup_vepu541_intra_refresh()
1087 RK_U32 w = ctx->sps->pic_width_in_mbs * 16; in setup_vepu541_roi()
1243 RK_S32 pic_w = sps->pic_width_in_mbs * 16; in setup_vepu541_me()
1281 if (cime_blk_w_max / 4 * 2 > (sps->pic_width_in_mbs * 2 + 1) / 2) in setup_vepu541_me()
1282 cime_blk_w_max = (sps->pic_width_in_mbs * 2 + 1) / 2 / 2 * 4; in setup_vepu541_me()
1807 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu541_ret_task()
H A Dhal_h264e_vepu510_tune.c141 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in vepu510_h264e_tune_stat_update()
H A Dhal_h264e_vepu580.c1251 RK_S32 mb_w = sps->pic_width_in_mbs; in setup_vepu580_rc_base()
1486 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in setup_vepu580_intra_refresh()
1736 RK_S32 pic_wd64 = MPP_ALIGN(sps->pic_width_in_mbs * 16, 64) / 64; in calc_cime_parameter()
1853 if (cime_blk_w_max / 4 * 2 > (sps->pic_width_in_mbs * 2 + 1) / 2) in setup_vepu580_me()
1854 cime_blk_w_max = (sps->pic_width_in_mbs * 2 + 1) / 2 / 2 * 4; in setup_vepu580_me()
2461 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu580_ret_task()
H A Dhal_h264e_vepu511.c1161 RK_S32 mb_w = sps->pic_width_in_mbs; in setup_vepu511_rc_base()
1413 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in setup_vepu511_intra_refresh()
2450 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in vepu511_h264e_update_tune_stat()
2547 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu511_ret_task()
H A Dhal_h264e_vepu510.c1166 RK_S32 mb_w = sps->pic_width_in_mbs; in setup_vepu510_rc_base()
1413 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in setup_vepu510_intra_refresh()
2491 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu510_ret_task()
H A Dhal_h264e_vepu540c.c894 RK_S32 mb_w = sps->pic_width_in_mbs; in setup_vepu540c_rc_base()
1690 RK_U32 mb_w = ctx->sps->pic_width_in_mbs; in hal_h264e_vepu540c_ret_task()
/rockchip-linux_mpp/mpp/hal/vpu/vp8e/
H A Dhal_vp8e_base.h114 RK_S32 pic_width_in_mbs; member
H A Dhal_vp8e_base.c1022 sps->pic_width_in_mbs = width_align / 16; in set_parameter()
1168 RK_S32 width = ctx->sps.pic_width_in_mbs * 16; in set_picbuf()