Searched refs:peaking_ctrl_value_P1 (Results 1 – 1 of 1) sorted by relevance
516 RK_S32 peaking_ctrl_value_P1[7] = { 0 }; in set_shp_to_vdpp2_reg() local617 peaking_ctrl_value_P1[ii] = ((ratio_pos_tmp * (coring_thr - coring_zero) + 512) >> 10); in set_shp_to_vdpp2_reg()626 peaking_ctrl_value_P2[ii] = peaking_ctrl_value_P1[ii] + peaking_ctrl_add_tmp; in set_shp_to_vdpp2_reg()652 peaking_ctrl_value_P1[ii] = mpp_clip(peaking_ctrl_value_P1[ii], -256, 255); in set_shp_to_vdpp2_reg()675 dst_reg->sharp.reg17.sw_peaking0_value_p1 = peaking_ctrl_value_P1[0]; in set_shp_to_vdpp2_reg()696 dst_reg->sharp.reg28.sw_peaking1_value_p1 = peaking_ctrl_value_P1[1]; in set_shp_to_vdpp2_reg()717 dst_reg->sharp.reg39.sw_peaking2_value_p1 = peaking_ctrl_value_P1[2]; in set_shp_to_vdpp2_reg()738 dst_reg->sharp.reg50.sw_peaking3_value_p1 = peaking_ctrl_value_P1[3]; in set_shp_to_vdpp2_reg()759 dst_reg->sharp.reg61.sw_peaking4_value_p1 = peaking_ctrl_value_P1[4]; in set_shp_to_vdpp2_reg()780 dst_reg->sharp.reg72.sw_peaking5_value_p1 = peaking_ctrl_value_P1[5]; in set_shp_to_vdpp2_reg()[all …]