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Searched refs:num_ref_idx_l0_default_active_minus1 (Results 1 – 15 of 15) sorted by relevance

/rockchip-linux_mpp/mpp/codec/dec/h264/
H A Dh264d_pps.c83 READ_UE(p_bitctx, &cur_pps->num_ref_idx_l0_default_active_minus1); in parser_pps()
84 VAL_CHECK(ret, cur_pps->num_ref_idx_l0_default_active_minus1 < 32); in parser_pps()
H A Dh264d_fill.c176 pp->num_ref_idx_l0_active_minus1 = p_Vid->active_pps->num_ref_idx_l0_default_active_minus1; in fill_picparams()
307 …p_long->num_ref_idx_l0_active_minus1 = currSlice->active_pps->num_ref_idx_l0_default_active_minus1; in fill_slice_syntax()
H A Dh264d_slice.c330 ret |= (pps->num_ref_idx_l0_default_active_minus1 > 31); in check_sps_pps()
567 …um_ref_idx_active[LIST_0] = currSlice->p_Vid->active_pps->num_ref_idx_l0_default_active_minus1 + 1; in process_slice()
H A Dh264d_global.h634 RK_S32 num_ref_idx_l0_default_active_minus1; // ue(v) member
H A Dh264d_init.c1541 RK_S32 pps_refs = currSlice->active_pps->num_ref_idx_l0_default_active_minus1 + 1; in check_refer_picture_lists()
/rockchip-linux_mpp/mpp/common/
H A Dh265d_syntax.h97 UCHAR num_ref_idx_l0_default_active_minus1; member
H A Dh265e_syntax_new.h57 RK_U8 num_ref_idx_l0_default_active_minus1; member
/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_syntax.c82 pp->num_ref_idx_l0_default_active_minus1 = pps->m_numRefIdxL0DefaultActive - 1; in fill_picture_parameters()
/rockchip-linux_mpp/mpp/codec/dec/h265/
H A Dh265d_parser2_syntax.c97 pp->num_ref_idx_l0_default_active_minus1 = pps->num_ref_idx_l0_default_active - 1; in fill_picture_parameters()
/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_rkv.c338 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4); in hal_h265d_v345_output_pps_packet()
549 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4); in hal_h265d_output_pps_packet()
H A Dhal_h265d_com.c572 sh.nb_refs[L0] = dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1; in hal_h265d_slice_output_rps()
H A Dhal_h265d_vdpu34x.c302 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4);//31 bits in hal_h265d_v345_output_pps_packet()
526 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4); in hal_h265d_output_pps_packet()
H A Dhal_h265d_vdpu382.c295 mpp_put_bits(&bp, dxva_cxt->pp.num_ref_idx_l0_default_active_minus1 + 1 , 4);//31 bits in hal_h265d_v382_output_pps_packet()
H A Dhal_h265d_vdpu384a.c430 mpp_put_bits(&bp, dxva_ctx->pp.num_ref_idx_l0_default_active_minus1 + 1, 4); in hal_h265d_v345_output_pps_packet()
H A Dhal_h265d_vdpu383.c462 mpp_put_bits(&bp, dxva_ctx->pp.num_ref_idx_l0_default_active_minus1 + 1, 4); in hal_h265d_v345_output_pps_packet()