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Searched refs:VEPU_REG_INTER_MODE (Results 1 – 4 of 4) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu1_reg_tbl.h119 #define VEPU_REG_INTER_MODE(x) (((x) & 0xffff) << 0) macro
H A Dhal_h264e_vepu2_reg_tbl.h202 #define VEPU_REG_INTER_MODE(x) (((x) & 0xffff) << 0) macro
H A Dhal_h264e_vepu1_v2.c382 | VEPU_REG_INTER_MODE(h264_inter_favor[hw_mbrc->qp_init]); in hal_h264e_vepu1_gen_regs_v2()
H A Dhal_h264e_vepu2_v2.c484 | VEPU_REG_INTER_MODE(h264_inter_favor[hw_mbrc->qp_init]); in hal_h264e_vepu2_gen_regs_v2()