Searched refs:VEPU_REG_CHECKPOINT_CHECK0 (Results 1 – 4 of 4) sorted by relevance
400 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[1]); in hal_h264e_vepu1_gen_regs_v2()404 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[3]); in hal_h264e_vepu1_gen_regs_v2()408 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[5]); in hal_h264e_vepu1_gen_regs_v2()412 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[7]); in hal_h264e_vepu1_gen_regs_v2()416 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[9]); in hal_h264e_vepu1_gen_regs_v2()
437 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[1]); in hal_h264e_vepu2_gen_regs_v2()441 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[3]); in hal_h264e_vepu2_gen_regs_v2()445 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[5]); in hal_h264e_vepu2_gen_regs_v2()449 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[7]); in hal_h264e_vepu2_gen_regs_v2()453 | VEPU_REG_CHECKPOINT_CHECK0(hw_mbrc->cp_target[9]); in hal_h264e_vepu2_gen_regs_v2()
137 #define VEPU_REG_CHECKPOINT_CHECK0(x) (((x) & 0xffff)) macro