Searched refs:temp32 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | fsl_ddr_gen4.c | 54 u32 temp32; in fsl_ddr_set_memctl_regs() local
235 temp32 = ddr_in32(&ddr->debug[28]); in fsl_ddr_set_memctl_regs()
236 temp32 |= DDR_TX_BD_DIS; in fsl_ddr_set_memctl_regs()
237 ddr_out32(&ddr->debug[28], temp32); in fsl_ddr_set_memctl_regs()
258 temp32 = ddr_in32(&ddr->debug[25]); in fsl_ddr_set_memctl_regs()
259 temp32 &= ~DDR_CAS_TO_PRE_SUB_MASK; in fsl_ddr_set_memctl_regs()
260 temp32 |= 9 << DDR_CAS_TO_PRE_SUB_SHIFT; in fsl_ddr_set_memctl_regs()
261 ddr_out32(&ddr->debug[25], temp32); in fsl_ddr_set_memctl_regs()
265 temp32 = get_ddr_freq(ctrl_num) / 1000000; in fsl_ddr_set_memctl_regs()
266 if ((temp32 > 1900) && (temp32 < 2300)) { in fsl_ddr_set_memctl_regs()
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| /rk3399_rockchip-uboot/board/freescale/mpc8572ds/ |
| H A D | mpc8572ds.c | 123 u32 temp32; in pci_init_board() local
132 PCI_BASE_ADDRESS_1, &temp32); in pci_init_board()
134 if (temp32 >= CONFIG_SYS_PCIE3_MEM_BUS) { in pci_init_board()
136 temp32, 4, 0); in pci_init_board()
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| /rk3399_rockchip-uboot/drivers/pci/ |
| H A D | fsl_pci_init.c | 298 u32 temp32; in fsl_pci_init() local
428 pci_hose_read_config_dword(hose, dev, pci_dcr, &temp32); in fsl_pci_init()
429 temp32 |= 0xf000e; /* set URR, FER, NFER (but not CER) */ in fsl_pci_init()
430 pci_hose_write_config_dword(hose, dev, pci_dcr, temp32); in fsl_pci_init()
434 temp32 = 0; in fsl_pci_init()
435 pci_hose_read_config_dword(hose, dev, pci_lcr, &temp32); in fsl_pci_init()
436 temp32 &= ~0x03; /* Disable ASPM */ in fsl_pci_init()
437 pci_hose_write_config_dword(hose, dev, pci_lcr, temp32); in fsl_pci_init()
502 temp32 = in_be32(&srds_regs->srdspccr0); in fsl_pci_init()
504 if ((temp32 >> 28) == 3) { in fsl_pci_init()
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