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Searched refs:soc_type (Results 1 – 8 of 8) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_tve.c126 int soc_type; member
134 int soc_type; member
170 if (tve->soc_type == SOC_RK3528) { in tve_set_mode()
197 if (tve->soc_type == SOC_RK3528) { in tve_set_mode()
224 if (tve->soc_type == SOC_RK3528) { in tve_set_mode()
251 if (tve->soc_type == SOC_RK3528) { in tve_set_mode()
287 if (tve->soc_type == SOC_RK3036) { in dac_enable()
291 } else if (tve->soc_type == SOC_RK312X) { in dac_enable()
295 } else if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) { in dac_enable()
297 } else if (tve->soc_type == SOC_RK3528) { in dac_enable()
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H A Dinno_mipi_phy.c157 enum soc_type { enum
396 enum soc_type soc_type, in inno_mipi_dphy_get_fixed_param() argument
402 if (soc_type == RK1808_MIPI_DPHY || soc_type == RK3506_MIPI_DPHY) { in inno_mipi_dphy_get_fixed_param()
427 if (soc_type == RK1808_MIPI_DPHY || soc_type == RK3506_MIPI_DPHY) in inno_mipi_dphy_get_fixed_param()
454 phy->soc_type, lane_type); in inno_mipi_dphy_lane_timing_init()
468 if (phy->soc_type == RV1108_MIPI_DPHY) { in inno_mipi_dphy_lane_timing_init()
693 if (phy->soc_type == RK1808_MIPI_DPHY) { in inno_mipi_dphy_set_pll()
701 if (phy->soc_type == RK3506_MIPI_DPHY) { in inno_mipi_dphy_set_pll()
797 phy->soc_type = RV1108_MIPI_DPHY; in inno_mipi_dphy_probe()
799 phy->soc_type = RK3506_MIPI_DPHY; in inno_mipi_dphy_probe()
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H A Dinno_video_combo_phy.c204 enum soc_type { enum
620 if (phy->soc_type == PX30_VIDEO_PHY || phy->soc_type == PX30S_VIDEO_PHY) in inno_video_phy_mipi_mode_enable()
957 .soc_type = PX30_VIDEO_PHY,
963 .soc_type = PX30S_VIDEO_PHY,
969 .soc_type = RK3128_VIDEO_PHY,
975 .soc_type = RK3368_VIDEO_PHY,
981 .soc_type = RK3568_VIDEO_PHY,
H A Drockchip_phy.h33 int soc_type; member
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/vf610/
H A Dgeneric.c22 static char soc_type[] = "xx0"; variable
308 soc_type, mxc_get_clock(MXC_ARM_CLK) / 1000000); in print_cpuinfo()
319 soc_type[0] = mscm->cpxcount ? '6' : '5'; /*Dual Core => VF6x0 */ in arch_cpu_init()
320 soc_type[1] = mscm->cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */ in arch_cpu_init()
331 strcat(soc, soc_type); in arch_misc_init()
/rk3399_rockchip-uboot/arch/arm/include/asm/mach-imx/
H A Dsys_proto.h21 #define soc_type(rev) (((rev) >> 12) & 0xf0) macro
24 #define get_soc_type() (soc_type(get_cpu_rev()))
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dcpu.c233 int soc_type, sku_info, chip_sku; in init_pllx() local
239 soc_type = tegra_get_chip(); in init_pllx()
240 debug("%s: SoC = 0x%02X\n", __func__, soc_type); in init_pllx()
/rk3399_rockchip-uboot/doc/
H A DREADME.socfpga112 <soc_type> \
119 soc_type - Type of SoC, either 'cyclone5' or 'arria5'.