Searched refs:readl_be (Results 1 – 9 of 9) sorted by relevance
112 readl_be(base + UART_FIFO_REG); in bcm6345_serial_flush()179 u32 val = readl_be(priv->base + UART_IR_REG); in bcm6345_serial_pending()199 val = readl_be(priv->base + UART_IR_REG); in bcm6345_serial_putc()213 val = readl_be(priv->base + UART_IR_REG); in bcm6345_serial_getc()220 val = readl_be(priv->base + UART_FIFO_REG); in bcm6345_serial_getc()286 u32 val = readl_be(base + UART_IR_REG); in wait_xfered()
74 val = readl_be(priv->regs); in bmips_short_cpu_desc()90 val = readl_be(priv->regs); in bmips_long_cpu_desc()108 mips_pll_fcvo = readl_be(priv->regs + REG_BCM6328_MISC_STRAPBUS); in bcm6328_get_cpu_freq()140 tmp = readl_be(priv->regs + REG_BCM6348_PERF_MIPSPLLCFG); in bcm6348_get_cpu_freq()152 tmp = readl_be(priv->regs + REG_BCM6358_DDR_DMIPSPLLCFG); in bcm6358_get_cpu_freq()164 mips_pll_fcvo = readl_be(priv->regs + REG_BCM63268_MISC_STRAPBUS); in bcm63268_get_cpu_freq()185 u32 val = readl_be(priv->regs + REG_BCM6328_OTP); in bcm6328_get_cpu_count()
80 #ifdef readl_be81 BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
50 return readl_be(priv->regs + DDR_CSEND_REG) << 24; in bcm6328_get_ram_size()68 val = readl_be(priv->regs + SDRAM_CFG_REG); in bcm6338_get_ram_size()82 val = readl_be(priv->regs + MEMC_CFG_REG); in bcm6358_get_ram_size()
28 return !!(readl_be(priv->reg_data) & BIT(offset)); in bcm6345_gpio_get_value()76 if (readl_be(priv->reg_dirout) & BIT(offset)) in bcm6345_gpio_get_function()
45 while (readl_be(regs + LED_CTRL_REG) & LED_CTRL_BUSY_MASK) in bcm6358_led_busy()53 return (readl_be(priv->regs + LED_MODE_REG) >> priv->pin) & in bcm6358_led_get_mode()
52 return ((readl_be(priv->mode) >> priv->shift) & LED_MODE_MASK); in bcm6328_led_get_mode()
400 priv->cs_pols = readl_be(priv->regs + SPI_CTL_REG) & in bcm63xx_hsspi_probe()
373 #define readl_be(addr) \ in BUILDIO_MEM() macro